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Searched refs:register_base (Results 1 – 6 of 6) sorted by relevance

/linux-4.1.27/drivers/net/phy/
Dmdio-octeon.c37 u64 register_base; member
52 smi_clk.u64 = cvmx_read_csr(p->register_base + SMI_CLK); in octeon_mdiobus_set_mode()
55 cvmx_write_csr(p->register_base + SMI_CLK, smi_clk.u64); in octeon_mdiobus_set_mode()
70 cvmx_write_csr(p->register_base + SMI_WR_DAT, smi_wr.u64); in octeon_mdiobus_c45_addr()
78 cvmx_write_csr(p->register_base + SMI_CMD, smi_cmd.u64); in octeon_mdiobus_c45_addr()
85 smi_wr.u64 = cvmx_read_csr(p->register_base + SMI_WR_DAT); in octeon_mdiobus_c45_addr()
117 cvmx_write_csr(p->register_base + SMI_CMD, smi_cmd.u64); in octeon_mdiobus_read()
124 smi_rd.u64 = cvmx_read_csr(p->register_base + SMI_RD_DAT); in octeon_mdiobus_read()
156 cvmx_write_csr(p->register_base + SMI_WR_DAT, smi_wr.u64); in octeon_mdiobus_write()
162 cvmx_write_csr(p->register_base + SMI_CMD, smi_cmd.u64); in octeon_mdiobus_write()
[all …]
/linux-4.1.27/drivers/spi/
Dspi-octeon.c30 u64 register_base; member
43 mpi_sts.u64 = cvmx_read_csr(p->register_base + OCTEON_SPI_STS); in octeon_spi_wait_ready()
88 cvmx_write_csr(p->register_base + OCTEON_SPI_CFG, mpi_cfg.u64); in octeon_spi_do_transfer()
100 cvmx_write_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i), d); in octeon_spi_do_transfer()
107 cvmx_write_csr(p->register_base + OCTEON_SPI_TX, mpi_tx.u64); in octeon_spi_do_transfer()
112 u64 v = cvmx_read_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i)); in octeon_spi_do_transfer()
124 cvmx_write_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i), d); in octeon_spi_do_transfer()
135 cvmx_write_csr(p->register_base + OCTEON_SPI_TX, mpi_tx.u64); in octeon_spi_do_transfer()
140 u64 v = cvmx_read_csr(p->register_base + OCTEON_SPI_DAT0 + (8 * i)); in octeon_spi_do_transfer()
200 p->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, in octeon_spi_probe()
[all …]
/linux-4.1.27/drivers/gpio/
Dgpio-octeon.c39 u64 register_base; member
46 cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), 0); in octeon_gpio_dir_in()
54 u64 reg = gpio->register_base + (value ? TX_SET : TX_CLEAR); in octeon_gpio_set()
69 cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), cfgx.u64); in octeon_gpio_dir_out()
76 u64 read_bits = cvmx_read_csr(gpio->register_base + RX_DAT); in octeon_gpio_get()
106 gpio->register_base = (u64)devm_ioremap(&pdev->dev, res_mem->start, in octeon_gpio_probe()
/linux-4.1.27/arch/x86/math-emu/
Dfpu_emu.h144 #define register_base ((u_char *) registers ) macro
145 #define fpu_register(x) ( * ((FPU_REG *)( register_base + 10 * (x & 7) )) )
146 #define st(x) ( * ((FPU_REG *)( register_base + 10 * ((top+x) & 7) )) )
Dreg_ld_str.c1128 __copy_from_user(register_base + offset, s, other); in frstor()
1130 __copy_from_user(register_base, s + other, offset); in frstor()
1209 if (__copy_to_user(d, register_base + offset, other)) in fsave()
1212 if (__copy_to_user(d + other, register_base, offset)) in fsave()
/linux-4.1.27/drivers/scsi/aic7xxx/
Daic79xx.reg3567 * Reading this register is equivalent to reading (register_base + SINDEX) and
3578 * Writing this register is equivalent to writing to (register_base + DINDEX)