| /linux-4.1.27/drivers/clk/tegra/ |
| D | clk-periph.c | 44 return mux_ops->set_parent(mux_hw, index); in clk_periph_set_parent()
116 .set_parent = clk_periph_set_parent,
127 .set_parent = clk_periph_set_parent,
135 .set_parent = clk_periph_set_parent,
|
| D | clk-super.c | 127 .set_parent = clk_super_set_parent,
|
| /linux-4.1.27/drivers/clk/ |
| D | clk-composite.c | 43 return mux_ops->set_parent(mux_hw, index); in clk_composite_set_parent()
83 mux_hw && mux_ops && mux_ops->set_parent) { in clk_composite_determine_rate()
224 if (mux_ops->set_parent) in clk_register_composite()
225 clk_composite_ops->set_parent = clk_composite_set_parent; in clk_register_composite()
|
| D | clk-cdce706.c | 163 .set_parent = cdce706_clkin_set_parent,
379 .set_parent = cdce706_divider_set_parent,
444 .set_parent = cdce706_clkout_set_parent,
|
| D | clk.c | 1524 if (parent && clk->ops->set_parent) in __clk_set_parent()
1525 ret = clk->ops->set_parent(clk->hw, p_index); in __clk_set_parent()
1772 } else if (clk->ops->set_parent) { in clk_change_rate()
1773 clk->ops->set_parent(clk->hw, clk->new_parent_index); in clk_change_rate()
2082 if ((clk->num_parents > 1) && (!clk->ops->set_parent)) { in clk_core_set_parent()
2303 if (clk->ops->set_parent && !clk->ops->get_parent) { in __clk_init()
2311 !(clk->ops->set_parent && clk->ops->set_rate)) { in __clk_init()
2623 .set_parent = clk_nodrv_set_parent,
|
| D | clk-mux.c | 106 .set_parent = clk_mux_set_parent,
|
| D | clk-qoriq.c | 64 .set_parent = cmux_set_parent,
|
| D | clk-wm831x.c | 342 .set_parent = wm831x_clkout_set_parent,
|
| D | clk-si5351.c | 532 .set_parent = si5351_pll_set_parent,
776 .set_parent = si5351_msynth_set_parent,
1093 .set_parent = si5351_clkout_set_parent,
|
| /linux-4.1.27/arch/avr32/mach-at32ap/ |
| D | clock.c | 182 if (!clk->set_parent) in clk_set_parent()
186 ret = clk->set_parent(clk, parent); in clk_set_parent()
239 buf, parent->set_parent ? '*' : ' ', in dump_clock()
|
| D | clock.h | 29 int (*set_parent)(struct clk *clk, struct clk *parent); member
|
| D | at32ap700x.c | 321 .set_parent = pll1_set_parent,
1481 .set_parent = genclk_set_parent,
2126 .set_parent = genclk_set_parent,
2183 .set_parent = genclk_set_parent,
2191 .set_parent = genclk_set_parent,
2199 .set_parent = genclk_set_parent,
2207 .set_parent = genclk_set_parent,
2215 .set_parent = genclk_set_parent,
|
| /linux-4.1.27/drivers/clk/ti/ |
| D | dpll.c | 37 .set_parent = &omap3_noncore_dpll_set_parent,
60 .set_parent = &omap3_noncore_dpll_set_parent,
71 .set_parent = &omap3_noncore_dpll_set_parent,
110 .set_parent = &omap3_noncore_dpll_set_parent,
122 .set_parent = &omap3_noncore_dpll_set_parent,
|
| D | mux.c | 104 .set_parent = ti_clk_mux_set_parent,
|
| /linux-4.1.27/arch/arm/mach-imx/ |
| D | clk-busy.c | 143 ret = busy->mux_ops->set_parent(&busy->mux.hw, index); in clk_busy_mux_set_parent()
152 .set_parent = clk_busy_mux_set_parent,
|
| D | clk-fixup-mux.c | 71 .set_parent = clk_fixup_mux_set_parent,
|
| /linux-4.1.27/arch/mips/jz4740/ |
| D | clock.h | 41 int (*set_parent)(struct clk *clk, struct clk *parent); member
|
| D | clock.c | 581 .set_parent = jz_clk_i2s_set_parent,
590 .set_parent = jz_clk_spi_set_parent,
655 .set_parent = jz_clk_udc_set_parent,
785 if (!clk->ops->set_parent) in clk_set_parent()
791 ret = clk->ops->set_parent(clk, parent); in clk_set_parent()
|
| /linux-4.1.27/drivers/clk/qcom/ |
| D | clk-regmap-mux.c | 56 .set_parent = mux_set_parent,
|
| D | clk-rcg2.c | 296 .set_parent = clk_rcg2_set_parent,
423 .set_parent = clk_rcg2_set_parent,
481 .set_parent = clk_rcg2_set_parent,
568 .set_parent = clk_rcg2_set_parent,
|
| D | clk-rcg.c | 629 .set_parent = clk_rcg_set_parent,
640 .set_parent = clk_rcg_set_parent,
651 .set_parent = clk_rcg_set_parent,
663 .set_parent = clk_dyn_rcg_set_parent,
|
| D | mmcc-msm8960.c | 577 .set_parent = pix_rdi_set_parent,
|
| /linux-4.1.27/drivers/sh/clk/ |
| D | core.c | 516 if (clk->ops->set_parent) in clk_set_parent()
517 ret = clk->ops->set_parent(clk, parent); in clk_set_parent()
655 if (likely(clkp->ops->set_parent)) in clks_core_resume()
656 clkp->ops->set_parent(clkp, in clks_core_resume()
|
| D | cpg.c | 333 .set_parent = sh_clk_div6_set_parent,
386 .set_parent = sh_clk_div4_set_parent,
|
| /linux-4.1.27/drivers/clk/pxa/ |
| D | clk-pxa.h | 23 .set_parent = dummy_clk_set_parent, \
|
| D | clk-pxa.c | 68 .set_parent = dummy_clk_set_parent,
|
| /linux-4.1.27/drivers/clk/st/ |
| D | clk-flexgen.c | 94 return clk_mux_ops.set_parent(mux_hw, index); in flexgen_set_parent()
171 .set_parent = flexgen_set_parent,
|
| D | clkgen-mux.c | 99 ret = clk_mux_ops.set_parent(mux_hw, genamux->muxsel); in clkgena_divmux_enable()
121 clk_mux_ops.set_parent(mux_hw, CKGAX_CLKOPSRC_SWITCH_OFF); in clkgena_divmux_disable()
209 .set_parent = clkgena_divmux_set_parent,
|
| /linux-4.1.27/drivers/clk/rockchip/ |
| D | clk-pll.c | 193 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_rate()
229 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_NORM); in rockchip_rk3066_pll_set_rate()
|
| /linux-4.1.27/drivers/clk/at91/ |
| D | clk-smd.c | 112 .set_parent = at91sam9x5_clk_smd_set_parent,
|
| D | clk-programmable.c | 170 .set_parent = clk_programmable_set_parent,
|
| D | clk-usb.c | 159 .set_parent = at91sam9x5_clk_usb_set_parent,
|
| D | clk-slow.c | 327 .set_parent = clk_sam9x5_slow_set_parent,
|
| D | clk-main.c | 554 .set_parent = clk_sam9x5_main_set_parent,
|
| /linux-4.1.27/drivers/clk/sirf/ |
| D | clk-common.c | 442 .set_parent = dmn_clk_set_parent,
490 .set_parent = dmn_clk_set_parent,
519 .set_parent = dmn_clk_set_parent,
|
| /linux-4.1.27/drivers/clk/versatile/ |
| D | clk-sp810.c | 123 .set_parent = clk_sp810_timerclken_set_parent,
|
| /linux-4.1.27/drivers/clk/sunxi/ |
| D | clk-sun6i-ar100.c | 168 .set_parent = ar100_set_parent,
|
| /linux-4.1.27/include/linux/ |
| D | sh_clk.h | 29 int (*set_parent)(struct clk *clk, struct clk *parent); member
|
| D | clk-provider.h | 184 int (*set_parent)(struct clk_hw *hw, u8 index); member
|
| /linux-4.1.27/drivers/clk/ux500/ |
| D | clk-sysctrl.c | 113 .set_parent = clk_sysctrl_set_parent,
|
| /linux-4.1.27/drivers/clk/socfpga/ |
| D | clk-gate.c | 181 .set_parent = socfpga_clk_set_parent,
|
| /linux-4.1.27/drivers/clk/shmobile/ |
| D | clk-div6.c | 169 .set_parent = cpg_div6_clock_set_parent,
|
| /linux-4.1.27/drivers/clk/berlin/ |
| D | berlin2-div.c | 233 .set_parent = berlin2_div_set_parent,
|
| /linux-4.1.27/arch/mips/alchemy/common/ |
| D | clock.c | 580 .set_parent = alchemy_clk_fgv1_setp,
725 .set_parent = alchemy_clk_fgv2_setp,
937 .set_parent = alchemy_clk_csrc_setp,
|
| /linux-4.1.27/Documentation/ |
| D | clk.txt | 80 int (*set_parent)(struct clk_hw *hw, u8 index);
215 .set_parent | | | n | y | n |
|
| /linux-4.1.27/drivers/clk/samsung/ |
| D | clk-s3c2410-dclk.c | 86 .set_parent = s3c24xx_clkout_set_parent,
|
| /linux-4.1.27/drivers/clk/mmp/ |
| D | clk-mix.c | 436 .set_parent = mmp_clk_set_parent,
|
| /linux-4.1.27/arch/arm/mach-shmobile/ |
| D | clock-r8a7740.c | 220 .set_parent = usb24s_set_parent,
|
| /linux-4.1.27/drivers/clk/bcm/ |
| D | clk-kona.c | 1179 .set_parent = kona_peri_clk_set_parent,
|