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Searched refs:CLK_DIV_MPLL_PRE (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dexynos3250.h88 #define CLK_DIV_MPLL_PRE 68 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dexynos3250.h88 #define CLK_DIV_MPLL_PRE 68 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dexynos3250.h88 #define CLK_DIV_MPLL_PRE 68 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dexynos3250.h88 #define CLK_DIV_MPLL_PRE 68 macro
/linux-4.4.14/include/dt-bindings/clock/
Dexynos3250.h88 #define CLK_DIV_MPLL_PRE 68 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dexynos3250.h88 #define CLK_DIV_MPLL_PRE 68 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dexynos3250.h88 #define CLK_DIV_MPLL_PRE 68 macro
/linux-4.4.14/arch/arm/boot/dts/
Dexynos3250.dtsi271 assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>;
/linux-4.4.14/drivers/clk/samsung/
Dclk-exynos3250.c345 DIV(CLK_DIV_MPLL_PRE, "div_mpll_pre", "sclk_mpll_mif", DIV_TOP, 28, 2),