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Searched refs:CLK_FIN_PLL (Results 1 – 57 of 57) sorted by relevance

/linux-4.4.14/include/dt-bindings/clock/
Dexynos5410.h5 #define CLK_FIN_PLL 1 macro
Dexynos5250.h16 #define CLK_FIN_PLL 1 macro
Dexynos5420.h16 #define CLK_FIN_PLL 1 macro
Dexynos4.h18 #define CLK_FIN_PLL 3 macro
Dexynos3250.h29 #define CLK_FIN_PLL 2 macro
Dexynos4415.h28 #define CLK_FIN_PLL 2 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dexynos5410.h5 #define CLK_FIN_PLL 1 macro
Dexynos5250.h16 #define CLK_FIN_PLL 1 macro
Dexynos5420.h16 #define CLK_FIN_PLL 1 macro
Dexynos4.h18 #define CLK_FIN_PLL 3 macro
Dexynos3250.h29 #define CLK_FIN_PLL 2 macro
Dexynos4415.h28 #define CLK_FIN_PLL 2 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dexynos5410.h5 #define CLK_FIN_PLL 1 macro
Dexynos5250.h16 #define CLK_FIN_PLL 1 macro
Dexynos5420.h16 #define CLK_FIN_PLL 1 macro
Dexynos4.h18 #define CLK_FIN_PLL 3 macro
Dexynos3250.h29 #define CLK_FIN_PLL 2 macro
Dexynos4415.h28 #define CLK_FIN_PLL 2 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dexynos5410.h5 #define CLK_FIN_PLL 1 macro
Dexynos5250.h16 #define CLK_FIN_PLL 1 macro
Dexynos5420.h16 #define CLK_FIN_PLL 1 macro
Dexynos4.h18 #define CLK_FIN_PLL 3 macro
Dexynos3250.h29 #define CLK_FIN_PLL 2 macro
Dexynos4415.h28 #define CLK_FIN_PLL 2 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dexynos5410.h5 #define CLK_FIN_PLL 1 macro
Dexynos5250.h16 #define CLK_FIN_PLL 1 macro
Dexynos5420.h16 #define CLK_FIN_PLL 1 macro
Dexynos4.h18 #define CLK_FIN_PLL 3 macro
Dexynos3250.h29 #define CLK_FIN_PLL 2 macro
Dexynos4415.h28 #define CLK_FIN_PLL 2 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dexynos5410.h5 #define CLK_FIN_PLL 1 macro
Dexynos5250.h16 #define CLK_FIN_PLL 1 macro
Dexynos5420.h16 #define CLK_FIN_PLL 1 macro
Dexynos4.h18 #define CLK_FIN_PLL 3 macro
Dexynos3250.h29 #define CLK_FIN_PLL 2 macro
Dexynos4415.h28 #define CLK_FIN_PLL 2 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dexynos5410.h5 #define CLK_FIN_PLL 1 macro
Dexynos5250.h16 #define CLK_FIN_PLL 1 macro
Dexynos5420.h16 #define CLK_FIN_PLL 1 macro
Dexynos4.h18 #define CLK_FIN_PLL 3 macro
Dexynos3250.h29 #define CLK_FIN_PLL 2 macro
Dexynos4415.h28 #define CLK_FIN_PLL 2 macro
/linux-4.4.14/arch/arm/boot/dts/
Dexynos5250.dtsi133 clocks = <&clock CLK_FIN_PLL>,
149 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
175 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
231 clocks = <&clock CLK_FIN_PLL>;
610 clocks = <&clock CLK_USB3>, <&clock CLK_FIN_PLL>;
649 clocks = <&clock CLK_USB2>, <&clock CLK_FIN_PLL>;
Dexynos3250.dtsi197 assigned-clock-parents = <&cmu CLK_FIN_PLL>,
198 <&cmu CLK_FIN_PLL>;
241 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
Dexynos5420.dtsi169 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
229 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
268 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
283 clocks = <&clock CLK_FIN_PLL>,
762 clocks = <&clock CLK_FIN_PLL>;
Dexynos4210.dtsi105 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos5422-odroidxu3-common.dtsi63 assigned-clock-parents = <&clock CLK_FIN_PLL>,
Dexynos4x12.dtsi84 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
Dexynos4415.dtsi191 clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
Dexynos5420-peach-pit.dts920 assigned-clock-parents = <&clock CLK_FIN_PLL>;
Dexynos5800-peach-pi.dts883 assigned-clock-parents = <&clock CLK_FIN_PLL>;
/linux-4.4.14/Documentation/devicetree/bindings/power/
Dpd-samsung.txt46 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>;
/linux-4.4.14/drivers/clk/samsung/
Dclk-exynos5250.c265 FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0),
Dclk-exynos4415.c273 FFACTOR(CLK_FIN_PLL, "fin_pll", "xusbxti", 1, 1, 0),
Dclk-exynos3250.c237 FFACTOR(CLK_FIN_PLL, "fin_pll", "xusbxti", 1, 1, 0),
Dclk-exynos5420.c482 FRATE(CLK_FIN_PLL, "fin_pll", NULL, CLK_IS_ROOT, 0),
Dclk-exynos4.c1250 fclk.id = CLK_FIN_PLL; in exynos4_clk_register_finpll()