| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 23 #define CLK_FOUT_VPLL 8 macro
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| D | exynos5420.h | 24 #define CLK_FOUT_VPLL 9 macro
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| D | exynos4.h | 22 #define CLK_FOUT_VPLL 7 macro
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| D | exynos3250.h | 31 #define CLK_FOUT_VPLL 4 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5250.h | 23 #define CLK_FOUT_VPLL 8 macro
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| D | exynos5420.h | 24 #define CLK_FOUT_VPLL 9 macro
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| D | exynos4.h | 22 #define CLK_FOUT_VPLL 7 macro
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| D | exynos3250.h | 31 #define CLK_FOUT_VPLL 4 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 23 #define CLK_FOUT_VPLL 8 macro
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| D | exynos5420.h | 24 #define CLK_FOUT_VPLL 9 macro
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| D | exynos4.h | 22 #define CLK_FOUT_VPLL 7 macro
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| D | exynos3250.h | 31 #define CLK_FOUT_VPLL 4 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 23 #define CLK_FOUT_VPLL 8 macro
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| D | exynos5420.h | 24 #define CLK_FOUT_VPLL 9 macro
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| D | exynos4.h | 22 #define CLK_FOUT_VPLL 7 macro
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| D | exynos3250.h | 31 #define CLK_FOUT_VPLL 4 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 23 #define CLK_FOUT_VPLL 8 macro
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| D | exynos5420.h | 24 #define CLK_FOUT_VPLL 9 macro
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| D | exynos4.h | 22 #define CLK_FOUT_VPLL 7 macro
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| D | exynos3250.h | 31 #define CLK_FOUT_VPLL 4 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 23 #define CLK_FOUT_VPLL 8 macro
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| D | exynos5420.h | 24 #define CLK_FOUT_VPLL 9 macro
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| D | exynos4.h | 22 #define CLK_FOUT_VPLL 7 macro
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| D | exynos3250.h | 31 #define CLK_FOUT_VPLL 4 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 23 #define CLK_FOUT_VPLL 8 macro
|
| D | exynos5420.h | 24 #define CLK_FOUT_VPLL 9 macro
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| D | exynos4.h | 22 #define CLK_FOUT_VPLL 7 macro
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| D | exynos3250.h | 31 #define CLK_FOUT_VPLL 4 macro
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos4.c | 1346 [vpll] = PLL_A(pll_4650c, CLK_FOUT_VPLL, "fout_vpll", "mout_vpllsrc",
1357 [vpll] = PLL(pll_36xx, CLK_FOUT_VPLL, "fout_vpll", "fin_pll",
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| D | clk-exynos5250.c | 758 [vpll] = PLL(pll_36xx, CLK_FOUT_VPLL, "fout_vpll", "mout_vpllsrc",
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| D | clk-exynos3250.c | 733 PLL(pll_36xx, CLK_FOUT_VPLL, "fout_vpll", "fin_pll",
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| D | clk-exynos5420.c | 1239 [vpll] = PLL(pll_2550, CLK_FOUT_VPLL, "fout_vpll", "fin_pll", VPLL_LOCK,
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