| /linux-4.4.14/drivers/clk/zte/ |
| D | clk-zx296702.c | 44 #define CLK_I2S1 (lsp0crpm_base + 0x20) macro
646 ARRAY_SIZE(i2s_wclk_sel), CLK_I2S1, 4, 1); in zx296702_lsp0_clocks_init()
648 zx_gate("i2s1_wclk", "i2s1_wclk_mux", CLK_I2S1, 1); in zx296702_lsp0_clocks_init()
650 zx_gate("i2s1_pclk", "lsp0_apb_pclk", CLK_I2S1, 0); in zx296702_lsp0_clocks_init()
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 113 #define CLK_I2S1 307 macro
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| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
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| D | s5pv210.h | 173 #define CLK_I2S1 152 macro
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| D | exynos4.h | 170 #define CLK_I2S1 330 macro
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| D | exynos4415.h | 270 #define CLK_I2S1 275 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5250.h | 113 #define CLK_I2S1 307 macro
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| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
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| D | s5pv210.h | 173 #define CLK_I2S1 152 macro
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| D | exynos4.h | 170 #define CLK_I2S1 330 macro
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| D | exynos4415.h | 270 #define CLK_I2S1 275 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 113 #define CLK_I2S1 307 macro
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| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
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| D | s5pv210.h | 173 #define CLK_I2S1 152 macro
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| D | exynos4.h | 170 #define CLK_I2S1 330 macro
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| D | exynos4415.h | 270 #define CLK_I2S1 275 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 113 #define CLK_I2S1 307 macro
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| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
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| D | s5pv210.h | 173 #define CLK_I2S1 152 macro
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| D | exynos4.h | 170 #define CLK_I2S1 330 macro
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| D | exynos4415.h | 270 #define CLK_I2S1 275 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 113 #define CLK_I2S1 307 macro
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| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
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| D | s5pv210.h | 173 #define CLK_I2S1 152 macro
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| D | exynos4.h | 170 #define CLK_I2S1 330 macro
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| D | exynos4415.h | 270 #define CLK_I2S1 275 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 113 #define CLK_I2S1 307 macro
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| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
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| D | s5pv210.h | 173 #define CLK_I2S1 152 macro
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| D | exynos4.h | 170 #define CLK_I2S1 330 macro
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| D | exynos4415.h | 270 #define CLK_I2S1 275 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 113 #define CLK_I2S1 307 macro
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| D | exynos5420.h | 84 #define CLK_I2S1 275 macro
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| D | s5pv210.h | 173 #define CLK_I2S1 152 macro
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| D | exynos4.h | 170 #define CLK_I2S1 330 macro
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| D | exynos4415.h | 270 #define CLK_I2S1 275 macro
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 636 GATE(CLK_I2S1, "i2s1", "div_aclk66", GATE_IP_PERIC, 20, 0, 0),
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| D | clk-s5pv210.c | 623 GATE(CLK_I2S1, "i2s1", "dout_pclkp", CLK_GATE_IP3, 5, 0, 0),
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| D | clk-exynos4415.c | 840 GATE(CLK_I2S1, "i2s1", "div_aclk_100", GATE_IP_PERIL, 20, 0, 0),
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| D | clk-exynos5420.c | 1061 GATE(CLK_I2S1, "i2s1", "mout_user_aclk66_peric",
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| D | clk-exynos4.c | 1015 GATE(CLK_I2S1, "i2s1", "aclk100", GATE_IP_PERIL, 20,
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | s5pv210.dtsi | 278 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
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| D | exynos4.dtsi | 393 clocks = <&clock CLK_I2S1>;
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| D | exynos5250.dtsi | 571 clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>;
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| D | exynos5420.dtsi | 423 clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>;
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