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Searched refs:CLK_MDMA (Results 1 – 18 of 18) sorted by relevance

/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Ds5pv210.h119 #define CLK_MDMA 98 macro
Dexynos4.h119 #define CLK_MDMA 279 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Ds5pv210.h119 #define CLK_MDMA 98 macro
Dexynos4.h119 #define CLK_MDMA 279 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Ds5pv210.h119 #define CLK_MDMA 98 macro
Dexynos4.h119 #define CLK_MDMA 279 macro
/linux-4.4.14/include/dt-bindings/clock/
Ds5pv210.h119 #define CLK_MDMA 98 macro
Dexynos4.h119 #define CLK_MDMA 279 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Ds5pv210.h119 #define CLK_MDMA 98 macro
Dexynos4.h119 #define CLK_MDMA 279 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Ds5pv210.h119 #define CLK_MDMA 98 macro
Dexynos4.h119 #define CLK_MDMA 279 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Ds5pv210.h119 #define CLK_MDMA 98 macro
Dexynos4.h119 #define CLK_MDMA 279 macro
/linux-4.4.14/drivers/clk/samsung/
Dclk-exynos4.c1049 GATE(CLK_MDMA, "mdma", "aclk200", E4210_GATE_IP_IMAGE, 2, 0, 0),
1096 GATE(CLK_MDMA, "mdma", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0),
Dclk-s5pv210.c593 GATE(CLK_MDMA, "mdma", "dout_hclkd", CLK_GATE_IP0, 2, 0, 0),
/linux-4.4.14/arch/arm/boot/dts/
Ds5pv210.dtsi538 clocks = <&clocks CLK_MDMA>;
Dexynos4.dtsi680 clocks = <&clock CLK_MDMA>;