| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5410.h | 28 #define CLK_MMC1 352 macro
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| D | pxa-clock.h | 42 #define CLK_MMC1 28 macro
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| D | exynos5420.h | 116 #define CLK_MMC1 352 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 28 #define CLK_MMC1 352 macro
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| D | pxa-clock.h | 42 #define CLK_MMC1 28 macro
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| D | exynos5420.h | 116 #define CLK_MMC1 352 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 28 #define CLK_MMC1 352 macro
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| D | pxa-clock.h | 42 #define CLK_MMC1 28 macro
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| D | exynos5420.h | 116 #define CLK_MMC1 352 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 28 #define CLK_MMC1 352 macro
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| D | pxa-clock.h | 42 #define CLK_MMC1 28 macro
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| D | exynos5420.h | 116 #define CLK_MMC1 352 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 28 #define CLK_MMC1 352 macro
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| D | pxa-clock.h | 42 #define CLK_MMC1 28 macro
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| D | exynos5420.h | 116 #define CLK_MMC1 352 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 28 #define CLK_MMC1 352 macro
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| D | pxa-clock.h | 42 #define CLK_MMC1 28 macro
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| D | exynos5420.h | 116 #define CLK_MMC1 352 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 28 #define CLK_MMC1 352 macro
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| D | pxa-clock.h | 42 #define CLK_MMC1 28 macro
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| D | exynos5420.h | 116 #define CLK_MMC1 352 macro
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | pxa3xx.dtsi | 72 clocks = <&clks CLK_MMC1>;
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| D | exynos5410.dtsi | 176 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
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| D | exynos5420.dtsi | 203 clocks = <&clock CLK_MMC1>, <&clock CLK_SCLK_MMC1>;
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos5410.c | 155 GATE(CLK_MMC1, "sdmmc1", "aclk200", GATE_BUS_FSYS0, 13, 0, 0),
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| D | clk-exynos5420.c | 1016 GATE(CLK_MMC1, "mmc1", "aclk200_fsys2", GATE_IP_FSYS, 13, 0, 0),
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