| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 81 #define CLK_PDMA0 275 macro
|
| D | exynos5420.h | 122 #define CLK_PDMA0 362 macro
|
| D | s5pv210.h | 118 #define CLK_PDMA0 97 macro
|
| D | exynos4.h | 132 #define CLK_PDMA0 292 macro
|
| D | exynos3250.h | 205 #define CLK_PDMA0 201 macro
|
| D | exynos4415.h | 265 #define CLK_PDMA0 270 macro
|
| D | exynos5433.h | 575 #define CLK_PDMA0 65 macro
|
| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5250.h | 81 #define CLK_PDMA0 275 macro
|
| D | exynos5420.h | 122 #define CLK_PDMA0 362 macro
|
| D | s5pv210.h | 118 #define CLK_PDMA0 97 macro
|
| D | exynos4.h | 132 #define CLK_PDMA0 292 macro
|
| D | exynos3250.h | 205 #define CLK_PDMA0 201 macro
|
| D | exynos4415.h | 265 #define CLK_PDMA0 270 macro
|
| D | exynos5433.h | 575 #define CLK_PDMA0 65 macro
|
| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 81 #define CLK_PDMA0 275 macro
|
| D | exynos5420.h | 122 #define CLK_PDMA0 362 macro
|
| D | s5pv210.h | 118 #define CLK_PDMA0 97 macro
|
| D | exynos4.h | 132 #define CLK_PDMA0 292 macro
|
| D | exynos3250.h | 205 #define CLK_PDMA0 201 macro
|
| D | exynos4415.h | 265 #define CLK_PDMA0 270 macro
|
| D | exynos5433.h | 575 #define CLK_PDMA0 65 macro
|
| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 81 #define CLK_PDMA0 275 macro
|
| D | exynos5420.h | 122 #define CLK_PDMA0 362 macro
|
| D | s5pv210.h | 118 #define CLK_PDMA0 97 macro
|
| D | exynos4.h | 132 #define CLK_PDMA0 292 macro
|
| D | exynos3250.h | 205 #define CLK_PDMA0 201 macro
|
| D | exynos4415.h | 265 #define CLK_PDMA0 270 macro
|
| D | exynos5433.h | 575 #define CLK_PDMA0 65 macro
|
| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 81 #define CLK_PDMA0 275 macro
|
| D | exynos5420.h | 122 #define CLK_PDMA0 362 macro
|
| D | s5pv210.h | 118 #define CLK_PDMA0 97 macro
|
| D | exynos4.h | 132 #define CLK_PDMA0 292 macro
|
| D | exynos3250.h | 205 #define CLK_PDMA0 201 macro
|
| D | exynos4415.h | 265 #define CLK_PDMA0 270 macro
|
| D | exynos5433.h | 575 #define CLK_PDMA0 65 macro
|
| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 81 #define CLK_PDMA0 275 macro
|
| D | exynos5420.h | 122 #define CLK_PDMA0 362 macro
|
| D | s5pv210.h | 118 #define CLK_PDMA0 97 macro
|
| D | exynos4.h | 132 #define CLK_PDMA0 292 macro
|
| D | exynos3250.h | 205 #define CLK_PDMA0 201 macro
|
| D | exynos4415.h | 265 #define CLK_PDMA0 270 macro
|
| D | exynos5433.h | 575 #define CLK_PDMA0 65 macro
|
| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 81 #define CLK_PDMA0 275 macro
|
| D | exynos5420.h | 122 #define CLK_PDMA0 362 macro
|
| D | s5pv210.h | 118 #define CLK_PDMA0 97 macro
|
| D | exynos4.h | 132 #define CLK_PDMA0 292 macro
|
| D | exynos3250.h | 205 #define CLK_PDMA0 201 macro
|
| D | exynos4415.h | 265 #define CLK_PDMA0 270 macro
|
| D | exynos5433.h | 575 #define CLK_PDMA0 65 macro
|
| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 601 GATE(CLK_PDMA0, "pdma0", "div_aclk200", GATE_IP_FSYS, 1, 0, 0),
|
| D | clk-s5pv210.c | 592 GATE(CLK_PDMA0, "pdma0", "dout_hclkp", CLK_GATE_IP0, 3, 0, 0),
|
| D | clk-exynos4415.c | 833 GATE(CLK_PDMA0, "pdma0", "div_aclk_200", GATE_IP_FSYS, 0, 0, 0),
|
| D | clk-exynos3250.c | 636 GATE(CLK_PDMA0, "pdma0", "div_aclk_200", GATE_IP_FSYS, 0, 0, 0),
|
| D | clk-exynos5420.c | 1011 GATE(CLK_PDMA0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0),
|
| D | clk-exynos4.c | 968 GATE(CLK_PDMA0, "pdma0", "aclk133", GATE_IP_FSYS, 0,
|
| D | clk-exynos5433.c | 2323 GATE(CLK_PDMA0, "pdma0", "aclk_pdma0", ENABLE_IP_FSYS0, 0, 0, 0),
|
| /linux-4.4.14/arch/arm/boot/dts/ |
| D | exynos3250.dtsi | 379 clocks = <&cmu CLK_PDMA0>;
|
| D | s5pv210.dtsi | 141 clocks = <&clocks CLK_PDMA0>;
|
| D | exynos4415.dtsi | 393 clocks = <&cmu CLK_PDMA0>;
|
| D | exynos4.dtsi | 658 clocks = <&clock CLK_PDMA0>;
|
| D | exynos5250.dtsi | 676 clocks = <&clock CLK_PDMA0>;
|
| D | exynos5420.dtsi | 349 clocks = <&clock CLK_PDMA0>;
|