Searched refs:CLK_PERIPH_SYS (Results 1 – 9 of 9) sorted by relevance
44 #define CLK_PERIPH_SYS 50 macro
40 GATE(CLK_PERIPH_SYS, "periph_sys", "sys_internal_div", 0x104, 18),
65 clocks = <&clk_core CLK_PERIPH_SYS>;