Searched refs:CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK (Results 1 – 8 of 8) sorted by relevance
620 #define CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK 110 macro
2302 GATE(CLK_PHYCLK_USBDRD30_UDRD30_PHYCLOCK,