Searched refs:CLK_SCLK_CSIS0 (Results 1 – 18 of 18) sorted by relevance
50 #define CLK_SCLK_CSIS0 134 macro
293 #define CLK_SCLK_CSIS0 334 macro
681 GATE(CLK_SCLK_CSIS0, "sclk_csis0", "div_csis0",
894 GATE(CLK_SCLK_CSIS0, "sclk_csis0", "div_csis0", SRC_MASK_CAM, 24,
236 clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
300 <&clock CLK_SCLK_CSIS0>;