| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 53 #define CLK_SCLK_SPI0 154 macro
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| D | exynos7-clk.h | 44 #define CLK_SCLK_SPI0 7 macro
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| D | exynos5420.h | 37 #define CLK_SCLK_SPI0 135 macro
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| D | exynos4.h | 75 #define CLK_SCLK_SPI0 159 macro
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| D | exynos3250.h | 249 #define CLK_SCLK_SPI0 245 macro
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| D | exynos4415.h | 323 #define CLK_SCLK_SPI0 364 macro
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| D | exynos5433.h | 437 #define CLK_SCLK_SPI0 33 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5250.h | 53 #define CLK_SCLK_SPI0 154 macro
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| D | exynos7-clk.h | 44 #define CLK_SCLK_SPI0 7 macro
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| D | exynos5420.h | 37 #define CLK_SCLK_SPI0 135 macro
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| D | exynos4.h | 75 #define CLK_SCLK_SPI0 159 macro
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| D | exynos3250.h | 249 #define CLK_SCLK_SPI0 245 macro
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| D | exynos4415.h | 323 #define CLK_SCLK_SPI0 364 macro
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| D | exynos5433.h | 437 #define CLK_SCLK_SPI0 33 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 53 #define CLK_SCLK_SPI0 154 macro
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| D | exynos7-clk.h | 44 #define CLK_SCLK_SPI0 7 macro
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| D | exynos5420.h | 37 #define CLK_SCLK_SPI0 135 macro
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| D | exynos4.h | 75 #define CLK_SCLK_SPI0 159 macro
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| D | exynos3250.h | 249 #define CLK_SCLK_SPI0 245 macro
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| D | exynos4415.h | 323 #define CLK_SCLK_SPI0 364 macro
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| D | exynos5433.h | 437 #define CLK_SCLK_SPI0 33 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 53 #define CLK_SCLK_SPI0 154 macro
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| D | exynos7-clk.h | 44 #define CLK_SCLK_SPI0 7 macro
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| D | exynos5420.h | 37 #define CLK_SCLK_SPI0 135 macro
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| D | exynos4.h | 75 #define CLK_SCLK_SPI0 159 macro
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| D | exynos3250.h | 249 #define CLK_SCLK_SPI0 245 macro
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| D | exynos4415.h | 323 #define CLK_SCLK_SPI0 364 macro
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| D | exynos5433.h | 437 #define CLK_SCLK_SPI0 33 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 53 #define CLK_SCLK_SPI0 154 macro
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| D | exynos7-clk.h | 44 #define CLK_SCLK_SPI0 7 macro
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| D | exynos5420.h | 37 #define CLK_SCLK_SPI0 135 macro
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| D | exynos4.h | 75 #define CLK_SCLK_SPI0 159 macro
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| D | exynos3250.h | 249 #define CLK_SCLK_SPI0 245 macro
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| D | exynos4415.h | 323 #define CLK_SCLK_SPI0 364 macro
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| D | exynos5433.h | 437 #define CLK_SCLK_SPI0 33 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 53 #define CLK_SCLK_SPI0 154 macro
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| D | exynos7-clk.h | 44 #define CLK_SCLK_SPI0 7 macro
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| D | exynos5420.h | 37 #define CLK_SCLK_SPI0 135 macro
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| D | exynos4.h | 75 #define CLK_SCLK_SPI0 159 macro
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| D | exynos3250.h | 249 #define CLK_SCLK_SPI0 245 macro
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| D | exynos4415.h | 323 #define CLK_SCLK_SPI0 364 macro
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| D | exynos5433.h | 437 #define CLK_SCLK_SPI0 33 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 53 #define CLK_SCLK_SPI0 154 macro
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| D | exynos7-clk.h | 44 #define CLK_SCLK_SPI0 7 macro
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| D | exynos5420.h | 37 #define CLK_SCLK_SPI0 135 macro
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| D | exynos4.h | 75 #define CLK_SCLK_SPI0 159 macro
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| D | exynos3250.h | 249 #define CLK_SCLK_SPI0 245 macro
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| D | exynos4415.h | 323 #define CLK_SCLK_SPI0 364 macro
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| D | exynos5433.h | 437 #define CLK_SCLK_SPI0 33 macro
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 548 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0",
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| D | clk-exynos4415.c | 755 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi0_pre",
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| D | clk-exynos3250.c | 553 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi0_pre",
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| D | clk-exynos7.c | 356 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_sclk_spi0",
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| D | clk-exynos5420.c | 957 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_spi0_pre",
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| D | clk-exynos4.c | 922 GATE(CLK_SCLK_SPI0, "sclk_spi0", "div_spi_pre0", SRC_MASK_PERIL1, 16,
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| D | clk-exynos5433.c | 1716 GATE(CLK_SCLK_SPI0, "sclk_spi0", "sclk_spi0_peric", ENABLE_SCLK_PERIC,
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | exynos3250.dtsi | 566 clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
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| D | exynos4415.dtsi | 572 clocks = <&cmu CLK_SPI0>, <&cmu CLK_SCLK_SPI0>;
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| D | exynos4.dtsi | 600 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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| D | exynos5250.dtsi | 461 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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| D | exynos5420.dtsi | 460 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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