| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5410.h | 15 #define CLK_SCLK_UART2 130 macro
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| D | exynos5250.h | 47 #define CLK_SCLK_UART2 148 macro
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| D | exynos7-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| D | exynos5420.h | 32 #define CLK_SCLK_UART2 130 macro
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| D | exynos4.h | 69 #define CLK_SCLK_UART2 153 macro
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| D | exynos4415.h | 325 #define CLK_SCLK_UART2 366 macro
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| D | exynos5433.h | 438 #define CLK_SCLK_UART2 34 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 15 #define CLK_SCLK_UART2 130 macro
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| D | exynos5250.h | 47 #define CLK_SCLK_UART2 148 macro
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| D | exynos7-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| D | exynos5420.h | 32 #define CLK_SCLK_UART2 130 macro
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| D | exynos4.h | 69 #define CLK_SCLK_UART2 153 macro
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| D | exynos4415.h | 325 #define CLK_SCLK_UART2 366 macro
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| D | exynos5433.h | 438 #define CLK_SCLK_UART2 34 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 15 #define CLK_SCLK_UART2 130 macro
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| D | exynos5250.h | 47 #define CLK_SCLK_UART2 148 macro
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| D | exynos7-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| D | exynos5420.h | 32 #define CLK_SCLK_UART2 130 macro
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| D | exynos4.h | 69 #define CLK_SCLK_UART2 153 macro
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| D | exynos4415.h | 325 #define CLK_SCLK_UART2 366 macro
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| D | exynos5433.h | 438 #define CLK_SCLK_UART2 34 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 15 #define CLK_SCLK_UART2 130 macro
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| D | exynos5250.h | 47 #define CLK_SCLK_UART2 148 macro
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| D | exynos7-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| D | exynos5420.h | 32 #define CLK_SCLK_UART2 130 macro
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| D | exynos4.h | 69 #define CLK_SCLK_UART2 153 macro
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| D | exynos4415.h | 325 #define CLK_SCLK_UART2 366 macro
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| D | exynos5433.h | 438 #define CLK_SCLK_UART2 34 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 15 #define CLK_SCLK_UART2 130 macro
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| D | exynos5250.h | 47 #define CLK_SCLK_UART2 148 macro
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| D | exynos7-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| D | exynos5420.h | 32 #define CLK_SCLK_UART2 130 macro
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| D | exynos4.h | 69 #define CLK_SCLK_UART2 153 macro
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| D | exynos4415.h | 325 #define CLK_SCLK_UART2 366 macro
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| D | exynos5433.h | 438 #define CLK_SCLK_UART2 34 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 15 #define CLK_SCLK_UART2 130 macro
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| D | exynos5250.h | 47 #define CLK_SCLK_UART2 148 macro
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| D | exynos7-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| D | exynos5420.h | 32 #define CLK_SCLK_UART2 130 macro
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| D | exynos4.h | 69 #define CLK_SCLK_UART2 153 macro
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| D | exynos4415.h | 325 #define CLK_SCLK_UART2 366 macro
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| D | exynos5433.h | 438 #define CLK_SCLK_UART2 34 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5410.h | 15 #define CLK_SCLK_UART2 130 macro
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| D | exynos5250.h | 47 #define CLK_SCLK_UART2 148 macro
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| D | exynos7-clk.h | 42 #define CLK_SCLK_UART2 5 macro
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| D | exynos5420.h | 32 #define CLK_SCLK_UART2 130 macro
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| D | exynos4.h | 69 #define CLK_SCLK_UART2 153 macro
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| D | exynos4415.h | 325 #define CLK_SCLK_UART2 366 macro
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| D | exynos5433.h | 438 #define CLK_SCLK_UART2 34 macro
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ |
| D | exynos5250-clock.txt | 39 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| D | exynos5420-clock.txt | 40 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| D | exynos4-clock.txt | 41 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos5410.c | 166 GATE(CLK_SCLK_UART2, "sclk_uart2", "div_uart2",
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| D | clk-exynos5250.c | 535 GATE(CLK_SCLK_UART2, "sclk_uart2", "div_uart2",
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| D | clk-exynos4415.c | 759 GATE(CLK_SCLK_UART2, "sclk_uart2", "div_uart2",
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| D | clk-exynos7.c | 365 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_sclk_uart2",
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| D | clk-exynos5420.c | 953 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_uart2",
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| D | clk-exynos4.c | 914 GATE(CLK_SCLK_UART2, "uclk2", "div_uart2", SRC_MASK_PERIL0, 8,
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| D | clk-exynos5433.c | 1718 GATE(CLK_SCLK_UART2, "sclk_uart2", "sclk_uart2_peric",
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | exynos5410.dtsi | 216 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| D | exynos4415.dtsi | 446 clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
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| D | exynos4.dtsi | 454 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| D | exynos5250.dtsi | 1082 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| D | exynos5420.dtsi | 1160 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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| /linux-4.4.14/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 154 <&clock_top0 CLK_SCLK_UART2>,
|