| /linux-4.4.14/drivers/clk/zte/ |
| D | clk-zx296702.c | 51 #define CLK_SDMMC0 (lsp1crpm_base + 0x2c) macro
712 ARRAY_SIZE(sdmmc0_wclk_sel), CLK_SDMMC0, 4, 1); in zx296702_lsp1_clocks_init()
714 zx_div("sdmmc0_wclk_div", "sdmmc0_wclk_mux", CLK_SDMMC0, 12, 4); in zx296702_lsp1_clocks_init()
716 zx_gate("sdmmc0_wclk", "sdmmc0_wclk_div", CLK_SDMMC0, 1); in zx296702_lsp1_clocks_init()
718 zx_gate("sdmmc0_pclk", "lsp1_apb_pclk", CLK_SDMMC0, 0); in zx296702_lsp1_clocks_init()
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 86 #define CLK_SDMMC0 280 macro
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| D | exynos4.h | 137 #define CLK_SDMMC0 297 macro
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| D | exynos3250.h | 203 #define CLK_SDMMC0 199 macro
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| D | exynos4415.h | 263 #define CLK_SDMMC0 268 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5250.h | 86 #define CLK_SDMMC0 280 macro
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| D | exynos4.h | 137 #define CLK_SDMMC0 297 macro
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| D | exynos3250.h | 203 #define CLK_SDMMC0 199 macro
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| D | exynos4415.h | 263 #define CLK_SDMMC0 268 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 86 #define CLK_SDMMC0 280 macro
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| D | exynos4.h | 137 #define CLK_SDMMC0 297 macro
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| D | exynos3250.h | 203 #define CLK_SDMMC0 199 macro
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| D | exynos4415.h | 263 #define CLK_SDMMC0 268 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 86 #define CLK_SDMMC0 280 macro
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| D | exynos4.h | 137 #define CLK_SDMMC0 297 macro
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| D | exynos3250.h | 203 #define CLK_SDMMC0 199 macro
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| D | exynos4415.h | 263 #define CLK_SDMMC0 268 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 86 #define CLK_SDMMC0 280 macro
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| D | exynos4.h | 137 #define CLK_SDMMC0 297 macro
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| D | exynos3250.h | 203 #define CLK_SDMMC0 199 macro
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| D | exynos4415.h | 263 #define CLK_SDMMC0 268 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 86 #define CLK_SDMMC0 280 macro
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| D | exynos4.h | 137 #define CLK_SDMMC0 297 macro
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| D | exynos3250.h | 203 #define CLK_SDMMC0 199 macro
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| D | exynos4415.h | 263 #define CLK_SDMMC0 268 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 86 #define CLK_SDMMC0 280 macro
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| D | exynos4.h | 137 #define CLK_SDMMC0 297 macro
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| D | exynos3250.h | 203 #define CLK_SDMMC0 199 macro
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| D | exynos4415.h | 263 #define CLK_SDMMC0 268 macro
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 606 GATE(CLK_SDMMC0, "sdmmc0", "div_aclk200", GATE_IP_FSYS, 12, 0, 0),
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| D | clk-exynos4415.c | 831 GATE(CLK_SDMMC0, "sdmmc0", "div_aclk_200", GATE_IP_FSYS, 5, 0, 0),
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| D | clk-exynos3250.c | 634 GATE(CLK_SDMMC0, "sdmmc0", "div_aclk_200", GATE_IP_FSYS, 5, 0, 0),
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| D | clk-exynos4.c | 972 GATE(CLK_SDMMC0, "sdmmc0", "aclk133", GATE_IP_FSYS, 5,
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | exynos3250.dtsi | 339 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
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| D | exynos4415.dtsi | 297 clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
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| D | exynos4.dtsi | 295 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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| D | exynos5250.dtsi | 505 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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