| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 73 #define CLK_SMMU_MFCL 267 macro
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| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| D | exynos4.h | 114 #define CLK_SMMU_MFCL 274 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos5250.h | 73 #define CLK_SMMU_MFCL 267 macro
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| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| D | exynos4.h | 114 #define CLK_SMMU_MFCL 274 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 73 #define CLK_SMMU_MFCL 267 macro
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| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| D | exynos4.h | 114 #define CLK_SMMU_MFCL 274 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 73 #define CLK_SMMU_MFCL 267 macro
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| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| D | exynos4.h | 114 #define CLK_SMMU_MFCL 274 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 73 #define CLK_SMMU_MFCL 267 macro
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| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| D | exynos4.h | 114 #define CLK_SMMU_MFCL 274 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 73 #define CLK_SMMU_MFCL 267 macro
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| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| D | exynos4.h | 114 #define CLK_SMMU_MFCL 274 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos5250.h | 73 #define CLK_SMMU_MFCL 267 macro
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| D | exynos5420.h | 137 #define CLK_SMMU_MFCL 402 macro
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| D | exynos4.h | 114 #define CLK_SMMU_MFCL 274 macro
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-exynos5250.c | 589 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "mout_aclk333_sub", GATE_IP_MFC, 2, 0,
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| D | clk-exynos5420.c | 1196 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "dout_mfc_blk", GATE_IP_MFC, 1, 0, 0),
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| D | clk-exynos4.c | 957 GATE(CLK_SMMU_MFCL, "smmu_mfcl", "aclk100", GATE_IP_MFC, 1,
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | exynos4.dtsi | 854 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
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| D | exynos5250.dtsi | 835 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
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| D | exynos5420.dtsi | 1087 clocks = <&clock CLK_SMMU_MFCL>, <&clock CLK_MFC>;
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