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Searched refs:CLK_TZPC5 (Results 1 – 32 of 32) sorted by relevance

/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dexynos5250.h135 #define CLK_TZPC5 329 macro
Dexynos5420.h101 #define CLK_TZPC5 308 macro
Dexynos3250.h153 #define CLK_TZPC5 149 macro
Dexynos4415.h209 #define CLK_TZPC5 214 macro
/linux-4.4.14/include/dt-bindings/clock/
Dexynos5250.h135 #define CLK_TZPC5 329 macro
Dexynos5420.h101 #define CLK_TZPC5 308 macro
Dexynos3250.h153 #define CLK_TZPC5 149 macro
Dexynos4415.h209 #define CLK_TZPC5 214 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dexynos5250.h135 #define CLK_TZPC5 329 macro
Dexynos5420.h101 #define CLK_TZPC5 308 macro
Dexynos3250.h153 #define CLK_TZPC5 149 macro
Dexynos4415.h209 #define CLK_TZPC5 214 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dexynos5250.h135 #define CLK_TZPC5 329 macro
Dexynos5420.h101 #define CLK_TZPC5 308 macro
Dexynos3250.h153 #define CLK_TZPC5 149 macro
Dexynos4415.h209 #define CLK_TZPC5 214 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dexynos5250.h135 #define CLK_TZPC5 329 macro
Dexynos5420.h101 #define CLK_TZPC5 308 macro
Dexynos3250.h153 #define CLK_TZPC5 149 macro
Dexynos4415.h209 #define CLK_TZPC5 214 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dexynos5250.h135 #define CLK_TZPC5 329 macro
Dexynos5420.h101 #define CLK_TZPC5 308 macro
Dexynos3250.h153 #define CLK_TZPC5 149 macro
Dexynos4415.h209 #define CLK_TZPC5 214 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dexynos5250.h135 #define CLK_TZPC5 329 macro
Dexynos5420.h101 #define CLK_TZPC5 308 macro
Dexynos3250.h153 #define CLK_TZPC5 149 macro
Dexynos4415.h209 #define CLK_TZPC5 214 macro
/linux-4.4.14/drivers/clk/samsung/
Dclk-exynos5250.c664 GATE(CLK_TZPC5, "tzpc5", "div_aclk66", GATE_IP_PERIS, 11, 0, 0),
Dclk-exynos4415.c647 GATE(CLK_TZPC5, "tzpc5", "div_aclk_100", GATE_IP_PERIR, 10,
Dclk-exynos3250.c476 GATE(CLK_TZPC5, "tzpc5", "div_aclk_100", GATE_IP_PERIR, 10,
Dclk-exynos5420.c1093 GATE(CLK_TZPC5, "tzpc5", "aclk66_psgen", GATE_IP_PERIS, 11, 0, 0),