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Searched refs:CLK_UART0_DIV (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/include/dt-bindings/clock/
Dpistachio-clk.h70 #define CLK_UART0_DIV 77 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dpistachio-clk.h70 #define CLK_UART0_DIV 77 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dpistachio-clk.h70 #define CLK_UART0_DIV 77 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dpistachio-clk.h70 #define CLK_UART0_DIV 77 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dpistachio-clk.h70 #define CLK_UART0_DIV 77 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dpistachio-clk.h70 #define CLK_UART0_DIV 77 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dpistachio-clk.h70 #define CLK_UART0_DIV 77 macro
/linux-4.4.14/drivers/clk/pistachio/
Dclk-pistachio.c79 DIV_F(CLK_UART0_DIV, "uart0_div", "uart0_internal_div", 0x238, 10,