Searched refs:DGCS (Results 1 – 2 of 2) sorted by relevance
102 val = ioread32(bridge->base + DGCS); in ca91cx42_VERR_irqhandler()119 val = ioread32(bridge->base + DGCS); in ca91cx42_LERR_irqhandler()1182 tmp = ioread32(bridge->base + DGCS); in ca91cx42_dma_busy()1232 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()1241 iowrite32(val, bridge->base + DGCS); in ca91cx42_dma_list_exec()1245 iowrite32(val, bridge->base + DGCS); in ca91cx42_dma_list_exec()1251 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()1252 iowrite32(val | CA91CX42_DGCS_STOP_REQ, bridge->base + DGCS); in ca91cx42_dma_list_exec()1264 val = ioread32(bridge->base + DGCS); in ca91cx42_dma_list_exec()
149 #define DGCS 0x0220 macro