Searched refs:EXYNOS_DOUT_AUD_BUS (Results 1 – 10 of 10) sorted by relevance
15 #define EXYNOS_DOUT_AUD_BUS 3 macro
182 clk_table[EXYNOS_DOUT_AUD_BUS] = clk_register_divider(NULL, in exynos_audss_clk_probe()
47 <&clock_audss EXYNOS_DOUT_AUD_BUS>;449 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
62 <&clock_audss EXYNOS_DOUT_AUD_BUS>;