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Searched refs:HCLK_NANDC0 (Results 1 – 24 of 24) sorted by relevance

/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Drk3188-cru-common.h127 #define HCLK_NANDC0 467 macro
129 #define CLK_NR_CLKS (HCLK_NANDC0 + 1)
Drk3368-cru.h161 #define HCLK_NANDC0 453 macro
Drk3288-cru.h174 #define HCLK_NANDC0 453 macro
/linux-4.4.14/include/dt-bindings/clock/
Drk3188-cru-common.h127 #define HCLK_NANDC0 467 macro
129 #define CLK_NR_CLKS (HCLK_NANDC0 + 1)
Drk3368-cru.h161 #define HCLK_NANDC0 453 macro
Drk3288-cru.h174 #define HCLK_NANDC0 453 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Drk3188-cru-common.h127 #define HCLK_NANDC0 467 macro
129 #define CLK_NR_CLKS (HCLK_NANDC0 + 1)
Drk3288-cru.h174 #define HCLK_NANDC0 453 macro
Drk3368-cru.h161 #define HCLK_NANDC0 453 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Drk3188-cru-common.h127 #define HCLK_NANDC0 467 macro
129 #define CLK_NR_CLKS (HCLK_NANDC0 + 1)
Drk3288-cru.h174 #define HCLK_NANDC0 453 macro
Drk3368-cru.h161 #define HCLK_NANDC0 453 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Drk3188-cru-common.h127 #define HCLK_NANDC0 467 macro
129 #define CLK_NR_CLKS (HCLK_NANDC0 + 1)
Drk3288-cru.h174 #define HCLK_NANDC0 453 macro
Drk3368-cru.h161 #define HCLK_NANDC0 453 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Drk3188-cru-common.h127 #define HCLK_NANDC0 467 macro
129 #define CLK_NR_CLKS (HCLK_NANDC0 + 1)
Drk3368-cru.h161 #define HCLK_NANDC0 453 macro
Drk3288-cru.h174 #define HCLK_NANDC0 453 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Drk3188-cru-common.h127 #define HCLK_NANDC0 467 macro
129 #define CLK_NR_CLKS (HCLK_NANDC0 + 1)
Drk3288-cru.h174 #define HCLK_NANDC0 453 macro
Drk3368-cru.h161 #define HCLK_NANDC0 453 macro
/linux-4.4.14/drivers/clk/rockchip/
Dclk-rk3188.c449 GATE(HCLK_NANDC0, "hclk_nandc0", "hclk_peri", 0, RK2928_CLKGATE_CON(5), 9, GFLAGS),
Dclk-rk3368.c750 GATE(HCLK_NANDC0, "hclk_nandc0", "hclk_peri", 0, RK3368_CLKGATE_CON(20), 11, GFLAGS),
Dclk-rk3288.c679 GATE(HCLK_NANDC0, "hclk_nandc0", "hclk_peri", 0, RK3288_CLKGATE_CON(7), 14, GFLAGS),