Home
last modified time | relevance | path

Searched refs:HI6220_PLL1_DDR_GATE (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h163 #define HI6220_PLL1_DDR_GATE 2 macro
/linux-4.4.14/include/dt-bindings/clock/
Dhi6220-clock.h163 #define HI6220_PLL1_DDR_GATE 2 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h163 #define HI6220_PLL1_DDR_GATE 2 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h163 #define HI6220_PLL1_DDR_GATE 2 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h163 #define HI6220_PLL1_DDR_GATE 2 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h163 #define HI6220_PLL1_DDR_GATE 2 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h163 #define HI6220_PLL1_DDR_GATE 2 macro
/linux-4.4.14/drivers/clk/hisilicon/
Dclk-hi6220.c259 …{ HI6220_PLL1_DDR_GATE, "pll1_ddr_gate", "ddrpll1", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x1…