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Searched refs:HI6220_PLL_DDR_GATE (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h164 #define HI6220_PLL_DDR_GATE 3 macro
/linux-4.4.14/include/dt-bindings/clock/
Dhi6220-clock.h164 #define HI6220_PLL_DDR_GATE 3 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h164 #define HI6220_PLL_DDR_GATE 3 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h164 #define HI6220_PLL_DDR_GATE 3 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h164 #define HI6220_PLL_DDR_GATE 3 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h164 #define HI6220_PLL_DDR_GATE 3 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dhi6220-clock.h164 #define HI6220_PLL_DDR_GATE 3 macro
/linux-4.4.14/drivers/clk/hisilicon/
Dclk-hi6220.c260 …{ HI6220_PLL_DDR_GATE, "pll_ddr_gate", "ddrpll0", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x1…