Searched refs:IMX5_CLK_IPU_DI1_GATE (Results 1 – 10 of 10) sorted by relevance
73 #define IMX5_CLK_IPU_DI1_GATE 61 macro
134 <&clks IMX5_CLK_IPU_DI1_GATE>;
135 <&clks IMX5_CLK_IPU_DI1_GATE>;
250 clk[IMX5_CLK_IPU_DI1_GATE] = imx_clk_gate2("ipu_di1_gate", "ipu_di1_sel", MXC_CCM_CCGR6, 12); in mx5_clocks_common_init()