Searched refs:IMX6QDL_CLK_PLL3_USB_OTG (Results 1 – 15 of 15) sorted by relevance
185 #define IMX6QDL_CLK_PLL3_USB_OTG 172 macro
147 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,148 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
121 <&clks IMX6QDL_CLK_PLL3_USB_OTG>,122 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
239 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,240 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
216 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,217 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
253 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,254 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
351 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,352 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
702 clocks = <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
203 clk[IMX6QDL_CLK_PLL3_USB_OTG] = imx_clk_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); in imx6q_clocks_init()