Searched refs:IMX6QDL_CLK_PLL4_AUDIO_DIV (Results 1 – 9 of 9) sorted by relevance
216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
147 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
273 …clk[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CL… in imx6q_clocks_init()