Searched refs:IMX6SL_CLK_PLL5_POST_DIV (Results 1 – 8 of 8) sorted by relevance
28 #define IMX6SL_CLK_PLL5_POST_DIV 15 macro
273 …clks[IMX6SL_CLK_PLL5_POST_DIV] = clk_register_divider_table(NULL, "pll5_post_div", "pll5_video",… in imx6sl_clocks_init()