Searched refs:IMX7D_PLL_DRAM_MAIN_CLK (Results 1 – 8 of 8) sorted by relevance
61 #define IMX7D_PLL_DRAM_MAIN_CLK 48 macro
419 …clks[IMX7D_PLL_DRAM_MAIN_CLK] = imx_clk_gate("pll_dram_main_clk", "pll_dram_main_bypass", base + 0… in imx7d_clocks_init()