Searched refs:IMX7D_PLL_ENET_MAIN_250M_CLK (Results 1 – 8 of 8) sorted by relevance
54 #define IMX7D_PLL_ENET_MAIN_250M_CLK 41 macro
462 …clks[IMX7D_PLL_ENET_MAIN_250M_CLK] = imx_clk_gate("pll_enet_250m_clk", "pll_enet_250m", base + 0xe… in imx7d_clocks_init()863 clk_set_parent(clks[IMX7D_ENET_AXI_ROOT_SRC], clks[IMX7D_PLL_ENET_MAIN_250M_CLK]); in imx7d_clocks_init()