Searched refs:IMX7D_PLL_ENET_MAIN_25M_CLK (Results 1 – 8 of 8) sorted by relevance
59 #define IMX7D_PLL_ENET_MAIN_25M_CLK 46 macro
467 …clks[IMX7D_PLL_ENET_MAIN_25M_CLK] = imx_clk_gate("pll_enet_25m_clk", "pll_enet_25m", base + 0xe0,… in imx7d_clocks_init()864 clk_set_parent(clks[IMX7D_ENET_PHY_REF_ROOT_SRC], clks[IMX7D_PLL_ENET_MAIN_25M_CLK]); in imx7d_clocks_init()