Searched refs:IRQ_VIRT_BASE (Results 1 – 6 of 6) sorted by relevance
33 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) macro44 #define IRQ_MASK_LOW (IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)45 #define FIQ_MASK_LOW (IRQ_VIRT_BASE + FIQ_MASK_LOW_OFF)46 #define ENDPOINT_MASK_LOW (IRQ_VIRT_BASE + ENDPOINT_MASK_LOW_OFF)47 #define IRQ_MASK_HIGH (IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)48 #define FIQ_MASK_HIGH (IRQ_VIRT_BASE + FIQ_MASK_HIGH_OFF)49 #define ENDPOINT_MASK_HIGH (IRQ_VIRT_BASE + ENDPOINT_MASK_HIGH_OFF)50 #define PCIE_INTERRUPT_MASK (IRQ_VIRT_BASE + PCIE_INTERRUPT_MASK_OFF)
14 ldr \base, =IRQ_VIRT_BASE
28 orion_irq_init(0, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); in mv78xx0_init_irq()29 orion_irq_init(32, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); in mv78xx0_init_irq()30 orion_irq_init(64, IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF); in mv78xx0_init_irq()
120 static void __iomem *dove_irq_base = IRQ_VIRT_BASE;148 orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF); in dove_init_irq()149 orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF); in dove_init_irq()
26 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE + 0x0200) macro