| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-s3c2410.c | 128 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 10, 0, 0),
219 ALIAS(PCLK_UART0, "s3c2410-uart.0", "uart"),
222 ALIAS(PCLK_UART0, "s3c2410-uart.0", "clk_uart_baud0"),
307 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
310 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
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| D | clk-s3c2412.c | 163 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 19, 0, 0),
185 ALIAS(PCLK_UART0, "s3c2412-uart.0", "uart"),
188 ALIAS(PCLK_UART0, "s3c2412-uart.0", "clk_uart_baud2"),
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| D | clk-s3c2443.c | 188 GATE(PCLK_UART0, "uart0", "pclk", PCLKCON, 0, 0, 0),
194 ALIAS(PCLK_UART0, "s3c2440-uart.0", "uart"),
198 ALIAS(PCLK_UART0, "s3c2440-uart.0", "clk_uart_baud2"),
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| D | clk-s3c64xx.c | 310 GATE_BUS(PCLK_UART0, "pclk_uart0", "pclk", PCLK_GATE, 1),
415 ALIAS(PCLK_UART0, "s3c6400-uart.0", "uart"),
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| D | clk-exynos7.c | 664 GATE(PCLK_UART0, "pclk_uart0", "mout_aclk_peric0_66_user",
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ |
| D | samsung,s3c2412-clock.txt | 47 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
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| D | samsung,s3c2410-clock.txt | 48 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>;
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| D | samsung,s3c2443-clock.txt | 53 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
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| D | samsung,s3c64xx-clock.txt | 74 clocks = <&clock PCLK_UART0>, <&clocks PCLK_UART0>,
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 69 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 88 #define PCLK_UART0 332 macro
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| D | rk3288-cru.h | 139 #define PCLK_UART0 341 macro
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| D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 69 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 88 #define PCLK_UART0 332 macro
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| D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| D | rk3288-cru.h | 139 #define PCLK_UART0 341 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 69 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 88 #define PCLK_UART0 332 macro
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| D | rk3288-cru.h | 139 #define PCLK_UART0 341 macro
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| D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 69 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 88 #define PCLK_UART0 332 macro
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| D | rk3288-cru.h | 139 #define PCLK_UART0 341 macro
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| D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 69 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 88 #define PCLK_UART0 332 macro
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| D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| D | rk3288-cru.h | 139 #define PCLK_UART0 341 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 69 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 88 #define PCLK_UART0 332 macro
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| D | rk3288-cru.h | 139 #define PCLK_UART0 341 macro
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| D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | s3c2410.h | 34 #define PCLK_UART0 16 macro
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| D | s3c2412.h | 53 #define PCLK_UART0 41 macro
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| D | s3c2443.h | 69 #define PCLK_UART0 72 macro
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| D | samsung,s3c64xx-clock.h | 91 #define PCLK_UART0 73 macro
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| D | exynos7-clk.h | 81 #define PCLK_UART0 1 macro
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| D | rk3188-cru-common.h | 88 #define PCLK_UART0 332 macro
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| D | rk3368-cru.h | 128 #define PCLK_UART0 341 macro
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| D | rk3288-cru.h | 139 #define PCLK_UART0 341 macro
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | s3c2416.dtsi | 55 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
|
| D | s3c64xx.dtsi | 125 clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
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| D | rk3xxx.dtsi | 154 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
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| D | rk3288.dtsi | 384 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
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| /linux-4.4.14/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 622 GATE(PCLK_UART0, "pclk_uart0", "pclk_cpu", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
709 GATE(PCLK_UART0, "pclk_uart0", "hclk_ahb2apb", 0, RK2928_CLKGATE_CON(8), 0, GFLAGS),
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| D | clk-rk3368.c | 774 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK3368_CLKGATE_CON(19), 7, GFLAGS),
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| D | clk-rk3288.c | 695 GATE(PCLK_UART0, "pclk_uart0", "pclk_peri", 0, RK3288_CLKGATE_CON(6), 8, GFLAGS),
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| /linux-4.4.14/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 193 clocks = <&clock_peric0 PCLK_UART0>,
|
| /linux-4.4.14/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 363 clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
|