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Searched refs:PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dexynos7-clk.h139 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-4.4.14/include/dt-bindings/clock/
Dexynos7-clk.h139 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dexynos7-clk.h139 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dexynos7-clk.h139 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dexynos7-clk.h139 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dexynos7-clk.h139 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dexynos7-clk.h139 #define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6 macro
/linux-4.4.14/drivers/clk/samsung/
Dclk-exynos7.c951 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,