| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
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| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
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| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
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| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
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| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
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| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
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| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
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| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
|
| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
|
| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
|
| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
|
| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
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| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
|
| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
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| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | rk3188-cru-common.h | 23 #define PLL_GPLL 4 macro
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| D | rk3288-cru.h | 23 #define PLL_GPLL 4 macro
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| D | rk3368-cru.h | 23 #define PLL_GPLL 5 macro
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| /linux-4.4.14/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 221 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
232 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK2928_PLL_CON(12),
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| D | clk-rk3368.c | 146 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3368_PLL_CON(16),
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| D | clk-rk3288.c | 210 [gpll] = PLL(pll_rk3066, PLL_GPLL, "gpll", mux_pll_p, 0, RK3288_PLL_CON(12),
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | rk3288.dtsi | 728 assigned-clocks = <&cru PLL_GPLL>, <&cru PLL_CPLL>,
|