Searched refs:SABRE_CEAFSR_PDRD (Results 1 – 1 of 1) sorted by relevance
43 #define SABRE_CEAFSR_PDRD 0x4000000000000000UL /* Primary PCI DMA Read */ macro270 (SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | in sabre_ce_intr()279 ((error_bits & SABRE_CEAFSR_PDRD) ? in sabre_ce_intr()350 upa_writeq((SABRE_CEAFSR_PDRD | SABRE_CEAFSR_PDWR | in sabre_register_error_handlers()