| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 100 #define SCLK_UART2 5 macro
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| D | s5pv210.h | 198 #define SCLK_UART2 173 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_UART2 66 macro
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| D | rk3288-cru.h | 43 #define SCLK_UART2 79 macro
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| D | rk3368-cru.h | 41 #define SCLK_UART2 79 macro
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| /linux-4.4.14/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 100 #define SCLK_UART2 5 macro
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| D | s5pv210.h | 198 #define SCLK_UART2 173 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_UART2 66 macro
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| D | rk3368-cru.h | 41 #define SCLK_UART2 79 macro
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| D | rk3288-cru.h | 43 #define SCLK_UART2 79 macro
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| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 100 #define SCLK_UART2 5 macro
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| D | s5pv210.h | 198 #define SCLK_UART2 173 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_UART2 66 macro
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| D | rk3368-cru.h | 41 #define SCLK_UART2 79 macro
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| D | rk3288-cru.h | 43 #define SCLK_UART2 79 macro
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| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 100 #define SCLK_UART2 5 macro
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| D | s5pv210.h | 198 #define SCLK_UART2 173 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_UART2 66 macro
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| D | rk3368-cru.h | 41 #define SCLK_UART2 79 macro
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| D | rk3288-cru.h | 43 #define SCLK_UART2 79 macro
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| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 100 #define SCLK_UART2 5 macro
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| D | s5pv210.h | 198 #define SCLK_UART2 173 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_UART2 66 macro
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| D | rk3288-cru.h | 43 #define SCLK_UART2 79 macro
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| D | rk3368-cru.h | 41 #define SCLK_UART2 79 macro
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| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 100 #define SCLK_UART2 5 macro
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| D | s5pv210.h | 198 #define SCLK_UART2 173 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_UART2 66 macro
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| D | rk3288-cru.h | 43 #define SCLK_UART2 79 macro
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| D | rk3368-cru.h | 41 #define SCLK_UART2 79 macro
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| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/ |
| D | exynos7-clk.h | 100 #define SCLK_UART2 5 macro
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| D | s5pv210.h | 198 #define SCLK_UART2 173 macro
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| D | rk3188-cru-common.h | 31 #define SCLK_UART2 66 macro
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| D | rk3288-cru.h | 43 #define SCLK_UART2 79 macro
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| D | rk3368-cru.h | 41 #define SCLK_UART2 79 macro
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| /linux-4.4.14/arch/arm64/boot/dts/exynos/ |
| D | exynos7.dtsi | 214 <&clock_peric1 SCLK_UART2>;
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | rk3xxx.dtsi | 376 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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| D | s5pv210.dtsi | 361 <&clocks SCLK_UART2>;
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| D | rk3288.dtsi | 410 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-s5pv210.c | 637 GATE(SCLK_UART2, "sclk_uart2", "dout_uart2", CLK_SRC_MASK0, 14,
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| D | clk-exynos7.c | 778 GATE(SCLK_UART2, "sclk_uart2_user", "mout_sclk_uart2_user",
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| /linux-4.4.14/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 407 MUX(SCLK_UART2, "sclk_uart2", mux_sclk_uart2_p, 0,
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| D | clk-rk3368.c | 380 MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,
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| D | clk-rk3288.c | 560 MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,
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| /linux-4.4.14/arch/arm64/boot/dts/rockchip/ |
| D | rk3368.dtsi | 477 clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
|