Searched refs:SOCFPGA_PLL_DIVF_SHIFT (Results 1 – 2 of 2) sorted by relevance
37 #define SOCFPGA_PLL_DIVF_SHIFT 3 macro61 divf = (reg & SOCFPGA_PLL_DIVF_MASK) >> SOCFPGA_PLL_DIVF_SHIFT; in clk_pll_recalc_rate()
33 #define SOCFPGA_PLL_DIVF_SHIFT 0 macro54 divf = (reg & SOCFPGA_PLL_DIVF_MASK) >> SOCFPGA_PLL_DIVF_SHIFT; in clk_pll_recalc_rate()