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Searched refs:TEGRA20_CLK_PLL_D_OUT0 (Results 1 – 10 of 10) sorted by relevance

/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/linux-4.4.14/include/dt-bindings/clock/
Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/clock/
Dtegra20-car.h139 #define TEGRA20_CLK_PLL_D_OUT0 117 macro
/linux-4.4.14/drivers/clk/tegra/
Dclk-tegra20.c442 { .con_id = "pll_d_out0", .dt_id = TEGRA20_CLK_PLL_D_OUT0 },
686 clks[TEGRA20_CLK_PLL_D_OUT0] = clk; in tegra20_pll_init()
/linux-4.4.14/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt352 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
371 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
/linux-4.4.14/arch/arm/boot/dts/
Dtegra20.dtsi118 <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;