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Searched refs:UBI32_CORE1_CLAMP_RESET (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/reset/
Dqcom,gcc-ipq806x.h133 #define UBI32_CORE1_CLAMP_RESET 116 macro
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/reset/
Dqcom,gcc-ipq806x.h133 #define UBI32_CORE1_CLAMP_RESET 116 macro
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/reset/
Dqcom,gcc-ipq806x.h133 #define UBI32_CORE1_CLAMP_RESET 116 macro
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/reset/
Dqcom,gcc-ipq806x.h133 #define UBI32_CORE1_CLAMP_RESET 116 macro
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/reset/
Dqcom,gcc-ipq806x.h133 #define UBI32_CORE1_CLAMP_RESET 116 macro
/linux-4.4.14/include/dt-bindings/reset/
Dqcom,gcc-ipq806x.h133 #define UBI32_CORE1_CLAMP_RESET 116 macro
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/reset/
Dqcom,gcc-ipq806x.h133 #define UBI32_CORE1_CLAMP_RESET 116 macro
/linux-4.4.14/drivers/clk/qcom/
Dgcc-ipq806x.c2959 [UBI32_CORE1_CLAMP_RESET] = { 0x3d3c, 2 },