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Searched refs:XFER (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/arch/x86/crypto/
Dsha256-ssse3-asm.S84 XFER = %xmm9 define
403 movdqa (TBL), XFER
404 paddd X0, XFER
405 movdqa XFER, _XFER(%rsp)
408 movdqa 1*16(TBL), XFER
409 paddd X0, XFER
410 movdqa XFER, _XFER(%rsp)
413 movdqa 2*16(TBL), XFER
414 paddd X0, XFER
415 movdqa XFER, _XFER(%rsp)
[all …]
Dsha256-avx-asm.S91 XFER = %xmm9 define
396 vpaddd (TBL), X0, XFER
397 vmovdqa XFER, _XFER(%rsp)
400 vpaddd 1*16(TBL), X0, XFER
401 vmovdqa XFER, _XFER(%rsp)
404 vpaddd 2*16(TBL), X0, XFER
405 vmovdqa XFER, _XFER(%rsp)
408 vpaddd 3*16(TBL), X0, XFER
409 vmovdqa XFER, _XFER(%rsp)
418 vpaddd (TBL), X0, XFER
[all …]
Dsha256-avx2-asm.S84 XFER = %ymm9 define
600 vpaddd 0*32(TBL, SRND), X0, XFER
601 vmovdqa XFER, 0*32+_XFER(%rsp, SRND)
604 vpaddd 1*32(TBL, SRND), X0, XFER
605 vmovdqa XFER, 1*32+_XFER(%rsp, SRND)
608 vpaddd 2*32(TBL, SRND), X0, XFER
609 vmovdqa XFER, 2*32+_XFER(%rsp, SRND)
612 vpaddd 3*32(TBL, SRND), X0, XFER
613 vmovdqa XFER, 3*32+_XFER(%rsp, SRND)
622 vpaddd 0*32(TBL, SRND), X0, XFER
[all …]
Dsha512-avx2-asm.S68 XFER = YTMP0 define
619 vpaddq (TBL), Y_0, XFER
620 vmovdqa XFER, frame_XFER(%rsp)
623 vpaddq 1*32(TBL), Y_0, XFER
624 vmovdqa XFER, frame_XFER(%rsp)
627 vpaddq 2*32(TBL), Y_0, XFER
628 vmovdqa XFER, frame_XFER(%rsp)
631 vpaddq 3*32(TBL), Y_0, XFER
632 vmovdqa XFER, frame_XFER(%rsp)
641 vpaddq (TBL), Y_0, XFER
[all …]
/linux-4.4.14/drivers/dma/
Didma64.c45 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_off()
75 channel_set_bit(idma64, MASK(XFER), idma64c->mask); in idma64_chan_init()
154 dma_writel(idma64, CLEAR(XFER), idma64c->mask); in idma64_chan_irq()
182 channel_clear_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_irq()
185 status_xfer = dma_readl(idma64, RAW(XFER)); in idma64_irq()
192 channel_set_bit(idma64, MASK(XFER), idma64->all_chan_mask); in idma64_irq()
/linux-4.4.14/drivers/dma/dw/
Dcore.c146 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
354 status_xfer = dma_readl(dw, RAW.XFER); in dwc_scan_descriptors()
358 dma_writel(dw, CLEAR.XFER, dwc->mask); in dwc_scan_descriptors()
571 dma_writel(dw, CLEAR.XFER, dwc->mask); in dwc_handle_cyclic()
595 status_xfer = dma_readl(dw, RAW.XFER); in dw_dma_tasklet()
612 channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_tasklet()
631 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_interrupt()
642 channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); in dw_dma_interrupt()
1109 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_off()
1231 channel_clear_bit(dw, MASK.XFER, dwc->mask); in dwc_free_chan_resources()
[all …]
Dregs.h54 DW_REG(XFER);
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxnv50.c232 cp_wait(ctx, XFER, BUSY); in nv50_grctx_generate()
1343 cp_wait(ctx, XFER, BUSY); in nv50_gr_construct_xfer1()
3345 cp_wait(ctx, XFER, BUSY); in nv50_gr_construct_xfer2()