Searched refs:clock_division_ratio (Results 1 – 2 of 2) sorted by relevance
68 static int clock_division_ratio = WTCSR_CKS_4096; variable97 mod_timer(&wdt->timer, next_ping_period(clock_division_ratio)); in sh_wdt_start()100 csr |= WTCSR_WT | clock_division_ratio; in sh_wdt_start()193 mod_timer(&wdt->timer, next_ping_period(clock_division_ratio)); in sh_wdt_ping()281 wdt->timer.expires = next_ping_period(clock_division_ratio); in sh_wdt_probe()316 if (unlikely(clock_division_ratio < 0x5 || in sh_wdt_init()317 clock_division_ratio > 0x7)) { in sh_wdt_init()318 clock_division_ratio = WTCSR_CKS_4096; in sh_wdt_init()321 clock_division_ratio); in sh_wdt_init()339 module_param(clock_division_ratio, int, 0);[all …]
311 clock_division_ratio: Clock division ratio. Valid ranges are from 0x5 (1.31ms)