Home
last modified time | relevance | path

Searched refs:cur_lock (Results 1 – 4 of 4) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
Dradeon_cursor.c34 uint32_t cur_lock; in radeon_lock_cursor() local
37 cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
39 cur_lock |= EVERGREEN_CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
41 cur_lock &= ~EVERGREEN_CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
42 WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
44 cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
46 cur_lock |= AVIVO_D1CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
48 cur_lock &= ~AVIVO_D1CURSOR_UPDATE_LOCK; in radeon_lock_cursor()
49 WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
51 cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); in radeon_lock_cursor()
[all …]
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Ddce_v11_0.c2461 uint32_t cur_lock; in dce_v11_0_lock_cursor() local
2463 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset); in dce_v11_0_lock_cursor()
2465 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1); in dce_v11_0_lock_cursor()
2467 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0); in dce_v11_0_lock_cursor()
2468 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock); in dce_v11_0_lock_cursor()
Ddce_v10_0.c2472 uint32_t cur_lock; in dce_v10_0_lock_cursor() local
2474 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset); in dce_v10_0_lock_cursor()
2476 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 1); in dce_v10_0_lock_cursor()
2478 cur_lock = REG_SET_FIELD(cur_lock, CUR_UPDATE, CURSOR_UPDATE_LOCK, 0); in dce_v10_0_lock_cursor()
2479 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock); in dce_v10_0_lock_cursor()
Ddce_v8_0.c2386 uint32_t cur_lock; in dce_v8_0_lock_cursor() local
2388 cur_lock = RREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset); in dce_v8_0_lock_cursor()
2390 cur_lock |= CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK; in dce_v8_0_lock_cursor()
2392 cur_lock &= ~CUR_UPDATE__CURSOR_UPDATE_LOCK_MASK; in dce_v8_0_lock_cursor()
2393 WREG32(mmCUR_UPDATE + amdgpu_crtc->crtc_offset, cur_lock); in dce_v8_0_lock_cursor()