Searched refs:dfixed_const (Results 1 – 14 of 14) sorted by relevance
80 tmp.full = dfixed_const(100); in rs690_pm_info()81 rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info.ulBootUpMemoryClock)); in rs690_pm_info()84 rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock)); in rs690_pm_info()86 rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); in rs690_pm_info()89 rdev->pm.igp_system_mclk.full = dfixed_const(400); in rs690_pm_info()90 rdev->pm.igp_ht_link_clk.full = dfixed_const(le16_to_cpu(info->info.usFSBClock)); in rs690_pm_info()91 rdev->pm.igp_ht_link_width.full = dfixed_const(info->info.ucHTLinkWidth); in rs690_pm_info()94 tmp.full = dfixed_const(100); in rs690_pm_info()95 rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpSidePortClock)); in rs690_pm_info()98 rdev->pm.igp_system_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpUMAClock)); in rs690_pm_info()[all …]
979 a.full = dfixed_const(100); in rv515_crtc_bandwidth_compute()980 sclk.full = dfixed_const(selected_sclk); in rv515_crtc_bandwidth_compute()983 if (crtc->vsc.full > dfixed_const(2)) in rv515_crtc_bandwidth_compute()984 wm->num_line_pair.full = dfixed_const(2); in rv515_crtc_bandwidth_compute()986 wm->num_line_pair.full = dfixed_const(1); in rv515_crtc_bandwidth_compute()988 b.full = dfixed_const(mode->crtc_hdisplay); in rv515_crtc_bandwidth_compute()989 c.full = dfixed_const(256); in rv515_crtc_bandwidth_compute()993 if (a.full < dfixed_const(4)) { in rv515_crtc_bandwidth_compute()1005 a.full = dfixed_const(mode->clock); in rv515_crtc_bandwidth_compute()1006 b.full = dfixed_const(1000); in rv515_crtc_bandwidth_compute()[all …]
2020 a.full = dfixed_const(1000); in dce6_dram_bandwidth()2021 yclk.full = dfixed_const(wm->yclk); in dce6_dram_bandwidth()2023 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce6_dram_bandwidth()2024 a.full = dfixed_const(10); in dce6_dram_bandwidth()2025 dram_efficiency.full = dfixed_const(7); in dce6_dram_bandwidth()2040 a.full = dfixed_const(1000); in dce6_dram_bandwidth_for_display()2041 yclk.full = dfixed_const(wm->yclk); in dce6_dram_bandwidth_for_display()2043 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce6_dram_bandwidth_for_display()2044 a.full = dfixed_const(10); in dce6_dram_bandwidth_for_display()2045 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce6_dram_bandwidth_for_display()[all …]
2048 a.full = dfixed_const(1000); in evergreen_dram_bandwidth()2049 yclk.full = dfixed_const(wm->yclk); in evergreen_dram_bandwidth()2051 dram_channels.full = dfixed_const(wm->dram_channels * 4); in evergreen_dram_bandwidth()2052 a.full = dfixed_const(10); in evergreen_dram_bandwidth()2053 dram_efficiency.full = dfixed_const(7); in evergreen_dram_bandwidth()2068 a.full = dfixed_const(1000); in evergreen_dram_bandwidth_for_display()2069 yclk.full = dfixed_const(wm->yclk); in evergreen_dram_bandwidth_for_display()2071 dram_channels.full = dfixed_const(wm->dram_channels * 4); in evergreen_dram_bandwidth_for_display()2072 a.full = dfixed_const(10); in evergreen_dram_bandwidth_for_display()2073 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in evergreen_dram_bandwidth_for_display()[all …]
3260 temp_ff.full = dfixed_const(temp); in r100_bandwidth_update()3267 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()3268 pix_clk.full = dfixed_const(mode1->clock); /* convert to fixed point */ in r100_bandwidth_update()3270 temp_ff.full = dfixed_const(pixel_bytes1); in r100_bandwidth_update()3274 temp_ff.full = dfixed_const(1000); in r100_bandwidth_update()3275 pix_clk2.full = dfixed_const(mode2->clock); /* convert to fixed point */ in r100_bandwidth_update()3277 temp_ff.full = dfixed_const(pixel_bytes2); in r100_bandwidth_update()3323 trcd_ff.full = dfixed_const(mem_trcd); in r100_bandwidth_update()3324 trp_ff.full = dfixed_const(mem_trp); in r100_bandwidth_update()3325 tras_ff.full = dfixed_const(mem_tras); in r100_bandwidth_update()[all …]
9223 a.full = dfixed_const(1000); in dce8_dram_bandwidth()9224 yclk.full = dfixed_const(wm->yclk); in dce8_dram_bandwidth()9226 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce8_dram_bandwidth()9227 a.full = dfixed_const(10); in dce8_dram_bandwidth()9228 dram_efficiency.full = dfixed_const(7); in dce8_dram_bandwidth()9252 a.full = dfixed_const(1000); in dce8_dram_bandwidth_for_display()9253 yclk.full = dfixed_const(wm->yclk); in dce8_dram_bandwidth_for_display()9255 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce8_dram_bandwidth_for_display()9256 a.full = dfixed_const(10); in dce8_dram_bandwidth_for_display()9257 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce8_dram_bandwidth_for_display()[all …]
1803 a.full = dfixed_const(src_v); in radeon_crtc_scaling_mode_fixup()1804 b.full = dfixed_const(dst_v); in radeon_crtc_scaling_mode_fixup()1806 a.full = dfixed_const(src_h); in radeon_crtc_scaling_mode_fixup()1807 b.full = dfixed_const(dst_h); in radeon_crtc_scaling_mode_fixup()1810 radeon_crtc->vsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()1811 radeon_crtc->hsc.full = dfixed_const(1); in radeon_crtc_scaling_mode_fixup()
712 a.full = dfixed_const(100); in radeon_update_bandwidth_info()713 rdev->pm.sclk.full = dfixed_const(sclk); in radeon_update_bandwidth_info()715 rdev->pm.mclk.full = dfixed_const(mclk); in radeon_update_bandwidth_info()719 a.full = dfixed_const(16); in radeon_update_bandwidth_info()
35 #define dfixed_const(A) (u32)(((A) << 12))/* + ((B + 0.000122)*4096)) */ macro40 #define dfixed_init(A) { .full = dfixed_const((A)) }49 return dfixed_const(non_frac); in dfixed_floor()56 if (A.full > dfixed_const(non_frac)) in dfixed_ceil()57 return dfixed_const(non_frac + 1); in dfixed_ceil()59 return dfixed_const(non_frac); in dfixed_ceil()
875 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth()876 yclk.full = dfixed_const(wm->yclk); in dce_v8_0_dram_bandwidth()878 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v8_0_dram_bandwidth()879 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth()880 dram_efficiency.full = dfixed_const(7); in dce_v8_0_dram_bandwidth()904 a.full = dfixed_const(1000); in dce_v8_0_dram_bandwidth_for_display()905 yclk.full = dfixed_const(wm->yclk); in dce_v8_0_dram_bandwidth_for_display()907 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v8_0_dram_bandwidth_for_display()908 a.full = dfixed_const(10); in dce_v8_0_dram_bandwidth_for_display()909 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce_v8_0_dram_bandwidth_for_display()[all …]
920 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth()921 yclk.full = dfixed_const(wm->yclk); in dce_v11_0_dram_bandwidth()923 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v11_0_dram_bandwidth()924 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth()925 dram_efficiency.full = dfixed_const(7); in dce_v11_0_dram_bandwidth()949 a.full = dfixed_const(1000); in dce_v11_0_dram_bandwidth_for_display()950 yclk.full = dfixed_const(wm->yclk); in dce_v11_0_dram_bandwidth_for_display()952 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v11_0_dram_bandwidth_for_display()953 a.full = dfixed_const(10); in dce_v11_0_dram_bandwidth_for_display()954 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce_v11_0_dram_bandwidth_for_display()[all …]
932 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth()933 yclk.full = dfixed_const(wm->yclk); in dce_v10_0_dram_bandwidth()935 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v10_0_dram_bandwidth()936 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth()937 dram_efficiency.full = dfixed_const(7); in dce_v10_0_dram_bandwidth()961 a.full = dfixed_const(1000); in dce_v10_0_dram_bandwidth_for_display()962 yclk.full = dfixed_const(wm->yclk); in dce_v10_0_dram_bandwidth_for_display()964 dram_channels.full = dfixed_const(wm->dram_channels * 4); in dce_v10_0_dram_bandwidth_for_display()965 a.full = dfixed_const(10); in dce_v10_0_dram_bandwidth_for_display()966 disp_dram_allocation.full = dfixed_const(3); /* XXX worse case value 0.3 */ in dce_v10_0_dram_bandwidth_for_display()[all …]
744 a.full = dfixed_const(src_v); in amdgpu_crtc_scaling_mode_fixup()745 b.full = dfixed_const(dst_v); in amdgpu_crtc_scaling_mode_fixup()747 a.full = dfixed_const(src_h); in amdgpu_crtc_scaling_mode_fixup()748 b.full = dfixed_const(dst_h); in amdgpu_crtc_scaling_mode_fixup()751 amdgpu_crtc->vsc.full = dfixed_const(1); in amdgpu_crtc_scaling_mode_fixup()752 amdgpu_crtc->hsc.full = dfixed_const(1); in amdgpu_crtc_scaling_mode_fixup()
225 outf.full = max_t(u32, outf.full - dfixed_const(1), dfixed_const(1)); in compute_dda_inc()226 inf.full -= dfixed_const(1); in compute_dda_inc()229 dda_inc = min_t(u32, dda_inc, dfixed_const(max)); in compute_dda_inc()