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Searched refs:DC_HPD5_INT_CONTROL (Results 1 – 8 of 8) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Devergreen.c1751 tmp = RREG32(DC_HPD5_INT_CONTROL); in evergreen_hpd_set_polarity()
1756 WREG32(DC_HPD5_INT_CONTROL, tmp); in evergreen_hpd_set_polarity()
4545 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY; in evergreen_disable_interrupt_state()
4546 WREG32(DC_HPD5_INT_CONTROL, tmp); in evergreen_disable_interrupt_state()
4579 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in evergreen_irq_set()
4762 WREG32(DC_HPD5_INT_CONTROL, hpd5); in evergreen_irq_set()
4874 tmp = RREG32(DC_HPD5_INT_CONTROL); in evergreen_irq_ack()
4876 WREG32(DC_HPD5_INT_CONTROL, tmp); in evergreen_irq_ack()
4879 tmp = RREG32(DC_HPD5_INT_CONTROL); in evergreen_irq_ack()
4905 tmp = RREG32(DC_HPD5_INT_CONTROL); in evergreen_irq_ack()
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Dr600.c847 tmp = RREG32(DC_HPD5_INT_CONTROL); in r600_hpd_set_polarity()
852 WREG32(DC_HPD5_INT_CONTROL, tmp); in r600_hpd_set_polarity()
3548 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY; in r600_disable_interrupt_state()
3549 WREG32(DC_HPD5_INT_CONTROL, tmp); in r600_disable_interrupt_state()
3696 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN; in r600_irq_set()
3792 WREG32(DC_HPD5_INT_CONTROL, hpd5); in r600_irq_set()
3896 tmp = RREG32(DC_HPD5_INT_CONTROL); in r600_irq_ack()
3898 WREG32(DC_HPD5_INT_CONTROL, tmp); in r600_irq_ack()
3901 tmp = RREG32(DC_HPD5_INT_CONTROL); in r600_irq_ack()
Dsi.c5984 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY; in si_disable_interrupt_state()
5985 WREG32(DC_HPD5_INT_CONTROL, tmp); in si_disable_interrupt_state()
6092 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in si_irq_set()
6230 WREG32(DC_HPD5_INT_CONTROL, hpd5); in si_irq_set()
6330 tmp = RREG32(DC_HPD5_INT_CONTROL); in si_irq_ack()
6332 WREG32(DC_HPD5_INT_CONTROL, tmp); in si_irq_ack()
6335 tmp = RREG32(DC_HPD5_INT_CONTROL); in si_irq_ack()
6361 tmp = RREG32(DC_HPD5_INT_CONTROL); in si_irq_ack()
6363 WREG32(DC_HPD5_INT_CONTROL, tmp); in si_irq_ack()
6366 tmp = RREG32(DC_HPD5_INT_CONTROL); in si_irq_ack()
Dcik.c7341 tmp = RREG32(DC_HPD5_INT_CONTROL) & DC_HPDx_INT_POLARITY; in cik_disable_interrupt_state()
7342 WREG32(DC_HPD5_INT_CONTROL, tmp); in cik_disable_interrupt_state()
7468 hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~(DC_HPDx_INT_EN | DC_HPDx_RX_INT_EN); in cik_irq_set()
7622 WREG32(DC_HPD5_INT_CONTROL, hpd5); in cik_irq_set()
7739 tmp = RREG32(DC_HPD5_INT_CONTROL); in cik_irq_ack()
7741 WREG32(DC_HPD5_INT_CONTROL, tmp); in cik_irq_ack()
7744 tmp = RREG32(DC_HPD5_INT_CONTROL); in cik_irq_ack()
7769 tmp = RREG32(DC_HPD5_INT_CONTROL); in cik_irq_ack()
7771 WREG32(DC_HPD5_INT_CONTROL, tmp); in cik_irq_ack()
7774 tmp = RREG32(DC_HPD5_INT_CONTROL); in cik_irq_ack()
Dsid.h884 #define DC_HPD5_INT_CONTROL 0x6050 macro
Dcikd.h960 #define DC_HPD5_INT_CONTROL 0x6050 macro
Devergreend.h1350 #define DC_HPD5_INT_CONTROL 0x6050 macro
Dr600d.h861 #define DC_HPD5_INT_CONTROL 0x7dc4 macro