Searched refs:EMAC_MMC_TIRQE (Results 1 – 7 of 7) sorted by relevance
79 #define bfin_read_EMAC_MMC_TIRQE() bfin_read32(EMAC_MMC_TIRQE)80 #define bfin_write_EMAC_MMC_TIRQE(val) bfin_write32(EMAC_MMC_TIRQE, val)
48 #define EMAC_MMC_TIRQE 0xFFC03090 /* MMC TX Interrupt Enables Register … macro
79 #define bfin_read_EMAC_MMC_TIRQE() bfin_read32(EMAC_MMC_TIRQE)80 #define bfin_write_EMAC_MMC_TIRQE(val) bfin_write32(EMAC_MMC_TIRQE,val)
51 #define EMAC_MMC_TIRQE 0xFFC03090 /* MMC TX Interrupt Enables Register … macro
49 #define EMAC_MMC_TIRQE 0xFFC03090 /* MMC TX Interrupt Enables Register … macro
950 D32(EMAC_MMC_TIRQE); in bfin_debug_mmrs_init()