Searched refs:IOAT_CHANERR_OFFSET (Results 1 – 6 of 6) sorted by relevance
224 #define IOAT_CHANERR_OFFSET 0x28 /* 32-bit Channel Error Register */ macro
312 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat2_timer_event()357 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat2_reset_hw()358 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET); in ioat2_reset_hw()570 u32 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat2_alloc_chan_resources()
202 chanerr = readl(reg_base + IOAT_CHANERR_OFFSET); in ioat1_reset_channel()208 writel(chanerr, reg_base + IOAT_CHANERR_OFFSET); in ioat1_reset_channel()323 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat1_dma_alloc_chan_resources()326 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET); in ioat1_dma_alloc_chan_resources()580 u32 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat_get_current_completion()
458 u32 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat3_cleanup()508 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat3_eh()555 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET); in ioat3_eh()607 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat3_timer_event()1542 chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat3_reset_hw()1543 writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET); in ioat3_reset_hw()
270 return readl(chan->reg_base + IOAT_CHANERR_OFFSET); in ioat_chanerr()
109 err = readl(ioat_chanbase + IOAT_CHANERR_OFFSET); in i7300_idle_ioat_start()111 writel(err, ioat_chanbase + IOAT_CHANERR_OFFSET); in i7300_idle_ioat_start()