Searched refs:LC_LINK_WIDTH_RD_MASK (Results 1 – 9 of 9) sorted by relevance
952 # define LC_LINK_WIDTH_RD_MASK 0x70 macro
1095 # define LC_LINK_WIDTH_RD_MASK 0x70 macro
1508 # define LC_LINK_WIDTH_RD_MASK 0x70 macro
372 # define LC_LINK_WIDTH_RD_MASK 0x70 macro
2003 lanes = (link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT; in rv770_pcie_gen2_enable()
1487 # define LC_LINK_WIDTH_RD_MASK 0x70 macro
904 # define LC_LINK_WIDTH_RD_MASK 0x70 macro
4439 lanes = (link_width_cntl & LC_LINK_WIDTH_RD_MASK) >> LC_LINK_WIDTH_RD_SHIFT; in r600_pcie_gen2_enable()
4794 link_width = RREG32_PCIE_PORT(PCIE_LC_LINK_WIDTH_CNTL) & LC_LINK_WIDTH_RD_MASK; in ci_get_current_pcie_lane_number()