Searched refs:MC_SEQ_WR_CTL_D0 (Results 1 – 10 of 10) sorted by relevance
111 #define MC_SEQ_WR_CTL_D0 0x28bc macro
780 #define MC_SEQ_WR_CTL_D0 0x28bc macro
1878 case MC_SEQ_WR_CTL_D0 >> 2: in btc_check_s0_mc_reg_index()2036 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in btc_initialize_mc_reg_table()
548 #define MC_SEQ_WR_CTL_D0 0x28bc macro
663 #define MC_SEQ_WR_CTL_D0 0x28bc macro
293 #define MC_SEQ_WR_CTL_D0 0x28bc macro
4415 case MC_SEQ_WR_CTL_D0 >> 2: in ci_check_s0_mc_reg_index()4527 case MC_SEQ_WR_CTL_D0: in ci_register_patching_mc_seq()4616 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()
2791 case MC_SEQ_WR_CTL_D0 >> 2: in ni_check_s0_mc_reg_index()2890 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ni_initialize_mc_reg_table()
996 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_WR_CTL_D0 >> 2; in cypress_set_mc_reg_address_table()
5387 case MC_SEQ_WR_CTL_D0 >> 2: in si_check_s0_mc_reg_index()5490 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in si_initialize_mc_reg_table()