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Searched refs:OCTEON_IRQ_MBOX0 (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
Dirq.h25 OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 32, enumerator
/linux-4.1.27/arch/mips/cavium-octeon/
Docteon-irq.c1465 OCTEON_IRQ_MBOX0, 0, 32, 0, chip_mbox, handle_percpu_irq); in octeon_irq_init_ciu()
1692 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_enable_all()
1706 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_disable_all()
1721 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_enable_local()
1732 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_disable_local()
1981 do_IRQ(OCTEON_IRQ_MBOX0 + line); in octeon_irq_ciu2_mbox()
2057 irq_set_chip_and_handler(OCTEON_IRQ_MBOX0, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq); in octeon_irq_init_ciu2()
Dsmp.c206 if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, in octeon_prepare_cpus()