Searched refs:REG_A4XX_CP_ME_CNTL (Results 1 – 2 of 2) sorted by relevance
263 gpu_write(gpu, REG_A4XX_CP_ME_CNTL, 0); in a4xx_hw_init()436 REG_ADRENO_DEFINE(REG_ADRENO_CP_ME_CNTL, REG_A4XX_CP_ME_CNTL),
967 #define REG_A4XX_CP_ME_CNTL 0x0000022d macro